X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=configs%2Fsocfpga_sr1500_defconfig;h=c8239e7afffacc58db6c67acc4c97a6337157d09;hb=5e55543e65c3ada3d83d6f1b1ddc153ea64b0948;hp=81a3fc19fe9493576cac3d6bb5637dac535b6483;hpb=2f1eb66e2881a780e622e7fd50b3a497677fd373;p=u-boot diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 81a3fc19fe..c8239e7aff 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -1,27 +1,32 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_DM=y -CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_SR1500=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" +CONFIG_FIT=y +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb" +CONFIG_VERSION_VARIABLE=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y -CONFIG_FIT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y CONFIG_CMD_GREPENV=y CONFIG_CMD_MEMTEST=y # CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y -CONFIG_CMD_I2C=y -CONFIG_CMD_GPIO=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -31,15 +36,25 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_PART=y +CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)0" +CONFIG_CMD_UBI=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_FPGA_SOCFPGA=y +CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y CONFIG_SYS_I2C_DW=y CONFIG_DM_MMC=y +CONFIG_MMC_DW=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y CONFIG_CADENCE_QSPI=y