X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=configs%2Fxilinx_zynqmp_zc1751_xm019_dc5_defconfig;h=ca19e935f5fd3269478a6547af560aa099fbcf15;hb=HEAD;hp=b8fe33e47971d36a2841a285d4c617aebef3e56b;hpb=e1a71f8b339220fa74c9cd5d36ae9c444c492e83;p=u-boot diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index b8fe33e479..ca19e935f5 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -1,42 +1,64 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm019_dc5" CONFIG_ARCH_ZYNQMP=y -CONFIG_SYS_MALLOC_F_LEN=0x8000 -CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm019 dc5" CONFIG_SYS_TEXT_BASE=0x8000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL=y +CONFIG_DEBUG_UART_BASE=0xff000000 +CONFIG_DEBUG_UART_CLOCK=100000000 +CONFIG_DEFINE_TCM_OCM_MMAP=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5" +CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y # CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_SPL=y -CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_BOARD_EARLY_INIT_R=y CONFIG_SPL_OS_BOOT=y +CONFIG_SPL_RAM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_ATF=y CONFIG_SYS_PROMPT="ZynqMP> " -# CONFIG_CMD_IMLS is not set CONFIG_CMD_MEMTEST=y -CONFIG_CMD_UNZIP=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_CLK=y # CONFIG_CMD_FLASH is not set -CONFIG_CMD_MMC=y +CONFIG_CMD_FPGA_LOADBP=y +CONFIG_CMD_FPGA_LOADP=y CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TIME=y +CONFIG_MP=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y -# CONFIG_SPL_ISO_PARTITION is not set CONFIG_SPL_OF_CONTROL=y CONFIG_OF_EMBED=y +CONFIG_ENV_IS_IN_FAT=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_CLK_ZYNQMP=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y +CONFIG_MISC=y CONFIG_DM_MMC=y -CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TI=y +CONFIG_PHY_VITESSE=y +CONFIG_PHY_FIXED=y CONFIG_DM_ETH=y +CONFIG_PHY_GIGE=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ZYNQ_SERIAL=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y