X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=configs%2Fzynq_zc702_defconfig;h=ab719f97cd48e8caac55e3b74526d5cb9f5c584f;hb=HEAD;hp=c23dd8feab6b618108466de5f1eece8c33fda892;hpb=b25f8e2112b1582ce6386e846800a31bab688e50;p=u-boot

diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig
index c23dd8feab..ab719f97cd 100644
--- a/configs/zynq_zc702_defconfig
+++ b/configs/zynq_zc702_defconfig
@@ -3,6 +3,8 @@ CONFIG_SYS_CONFIG_NAME="zynq_zc70x"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
 CONFIG_SPL=y
+CONFIG_DEBUG_UART_BASE=0xe0001000
+CONFIG_DEBUG_UART_CLOCK=50000000
 CONFIG_IDENT_STRING=" Xilinx Zynq ZC702"
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
@@ -13,7 +15,6 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
-# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_SPI_LOAD=y
@@ -58,8 +59,6 @@ CONFIG_PHY_REALTEK=y
 CONFIG_PHY_XILINX=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_DEBUG_UART_ZYNQ=y
-CONFIG_DEBUG_UART_BASE=0xe0001000
-CONFIG_DEBUG_UART_CLOCK=50000000
 CONFIG_ZYNQ_SERIAL=y
 CONFIG_ZYNQ_QSPI=y
 CONFIG_USB=y