X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cpu%2Fi386%2Finterrupts.c;h=f340119900689bbc4d915cc1fe46208c6673a4fd;hb=f060054dadbbe7027ca088eed806a3ef1f82fdb7;hp=81d6881857c8a2c19e645fc12d981fa65371e6da;hpb=2262cfeef91458b01a1bfe3812ccbbfdf8b82807;p=u-boot diff --git a/cpu/i386/interrupts.c b/cpu/i386/interrupts.c index 81d6881857..f340119900 100644 --- a/cpu/i386/interrupts.c +++ b/cpu/i386/interrupts.c @@ -22,30 +22,12 @@ */ #include -#include #include #include #include #include -#if 0 -/* done */ -int interrupt_init (void); -void irq_install_handler(int, interrupt_handler_t *, void *); -void irq_free_handler (int); -void enable_interrupts (void); -int disable_interrupts (void); - -/* todo */ -void timer_interrupt (struct pt_regs *); -void external_interrupt (struct pt_regs *); -void reset_timer (void); -ulong get_timer (ulong base); -void set_timer (ulong t); - -#endif - struct idt_entry { u16 base_low; u16 selector; @@ -60,7 +42,7 @@ struct idt_entry idt[256]; #define MAX_IRQ 16 -typedef struct irq_handler { +typedef struct irq_handler { struct irq_handler *next; interrupt_handler_t* isr_func; void *isr_data; @@ -75,45 +57,6 @@ typedef struct { static irq_desc_t irq_table[MAX_IRQ]; - -/* syscall stuff, very untested - * the current approach which includes copying - * part of the stack will work badly for - * varargs functions. - * if we were to store the top three words on the - * stack (eip, ss, eflags) somwhere and add 14 to - * %esp .... - */ -asm(".globl syscall_entry\n" \ - "syscall_entry:\n" \ - "movl 12(%esp), %eax\n" \ - "movl %esp, %ebx\n" \ - "addl $16, %ebx\n" \ - "pushl %ebx\n" \ - "pushl %eax\n" \ - "call do_syscall\n" \ - "addl $8, %esp\n" \ - "iret\n"); - -void __attribute__ ((regparm(0))) syscall_entry(void); - -int __attribute__ ((regparm(0))) do_syscall(u32 nr, u32 *stack) -{ - if (nr= MAX_IRQ) { return; } irq_table[irq].status |= IRQ_DISABLED; - + } -void enable_irq(int irq) +void enable_irq(int irq) { if (irq >= MAX_IRQ) { return; @@ -227,7 +170,7 @@ void enable_irq(int irq) static void unmask_irq(int irq) { int imr_port; - + if (irq >= MAX_IRQ) { return; } @@ -236,7 +179,7 @@ static void unmask_irq(int irq) } else { imr_port = MASTER_PIC + IMR; } - + outb(inb(imr_port)&~(1<<(irq&7)), imr_port); } @@ -245,7 +188,7 @@ static void unmask_irq(int irq) static void mask_irq(int irq) { int imr_port; - + if (irq >= MAX_IRQ) { return; } @@ -254,8 +197,8 @@ static void mask_irq(int irq) } else { imr_port = MASTER_PIC + IMR; } - - outb(inb(imr_port)|(1<<(irq&7)), imr_port); + + outb(inb(imr_port)|(1<<(irq&7)), imr_port); } @@ -267,110 +210,110 @@ static void specific_eoi(int irq) if (irq > 7) { outb(OCW2_SEOI|(irq&7), SLAVE_PIC + OCW2); irq = SEOI_IR2; /* also do IR2 on master */ - } + } outb(OCW2_SEOI|irq, MASTER_PIC + OCW2); } -void __attribute__ ((regparm(0))) do_irq(int irq) +void __attribute__ ((regparm(0))) do_irq(int irq) { - + mask_irq(irq); - + if (irq_table[irq].status & IRQ_DISABLED) { unmask_irq(irq); specific_eoi(irq); return; } - - + + if (NULL != irq_table[irq].handler) { irq_handler_t *handler; - for (handler = irq_table[irq].handler; + for (handler = irq_table[irq].handler; NULL!= handler; handler = handler->next) { handler->isr_func(handler->isr_data); } } else { - if ((irq & 7) != 7) { + if ((irq & 7) != 7) { printf("Spurious irq %d\n", irq); } - } + } unmask_irq(irq); - specific_eoi(irq); + specific_eoi(irq); } -void __attribute__ ((regparm(0))) unknown_exception_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) unknown_exception_entry(int cause, int ip, int seg) { printf("Unknown Exception %d at %04x:%08x\n", cause, seg, ip); } -void __attribute__ ((regparm(0))) divide_exception_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) divide_exception_entry(int cause, int ip, int seg) { printf("Divide Error (Division by zero) at %04x:%08x\n", seg, ip); while(1); } -void __attribute__ ((regparm(0))) debug_exception_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) debug_exception_entry(int cause, int ip, int seg) { printf("Debug Interrupt (Single step) at %04x:%08x\n", seg, ip); } -void __attribute__ ((regparm(0))) nmi_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) nmi_entry(int cause, int ip, int seg) { printf("NMI Interrupt at %04x:%08x\n", seg, ip); } - -void __attribute__ ((regparm(0))) invalid_instruction_entry(int cause, int ip, int seg) + +void __attribute__ ((regparm(0))) invalid_instruction_entry(int cause, int ip, int seg) { printf("Invalid Instruction at %04x:%08x\n", seg, ip); while(1); } - -void __attribute__ ((regparm(0))) double_fault_entry(int cause, int ip, int seg) + +void __attribute__ ((regparm(0))) double_fault_entry(int cause, int ip, int seg) { printf("Double fault at %04x:%08x\n", seg, ip); while(1); } -void __attribute__ ((regparm(0))) invalid_tss_exception_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) invalid_tss_exception_entry(int cause, int ip, int seg) { printf("Invalid TSS at %04x:%08x\n", seg, ip); } - -void __attribute__ ((regparm(0))) seg_fault_entry(int cause, int ip, int seg) + +void __attribute__ ((regparm(0))) seg_fault_entry(int cause, int ip, int seg) { printf("Segmentation fault at %04x:%08x\n", seg, ip); while(1); } -void __attribute__ ((regparm(0))) stack_fault_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) stack_fault_entry(int cause, int ip, int seg) { printf("Stack fault at %04x:%08x\n", seg, ip); while(1); } -void __attribute__ ((regparm(0))) gpf_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) gpf_entry(int cause, int ip, int seg) { printf("General protection fault at %04x:%08x\n", seg, ip); } -void __attribute__ ((regparm(0))) page_fault_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) page_fault_entry(int cause, int ip, int seg) { printf("Page fault at %04x:%08x\n", seg, ip); while(1); } -void __attribute__ ((regparm(0))) fp_exception_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) fp_exception_entry(int cause, int ip, int seg) { printf("Floating point exception at %04x:%08x\n", seg, ip); } -void __attribute__ ((regparm(0))) alignment_check_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) alignment_check_entry(int cause, int ip, int seg) { printf("Alignment check at %04x:%08x\n", seg, ip); } - -void __attribute__ ((regparm(0))) machine_check_entry(int cause, int ip, int seg) + +void __attribute__ ((regparm(0))) machine_check_entry(int cause, int ip, int seg) { printf("Machine check exception at %04x:%08x\n", seg, ip); } @@ -379,31 +322,31 @@ void __attribute__ ((regparm(0))) machine_check_entry(int cause, int ip, int seg void irq_install_handler(int ino, interrupt_handler_t *func, void *pdata) { int status; - + if (ino>MAX_IRQ) { return; } - + if (NULL != irq_table[ino].handler) { return; } - + status = disable_interrupts(); irq_table[ino].handler = malloc(sizeof(irq_handler_t)); if (NULL == irq_table[ino].handler) { return; } - + memset(irq_table[ino].handler, 0, sizeof(irq_handler_t)); - + irq_table[ino].handler->isr_func = func; irq_table[ino].handler->isr_data = pdata; if (status) { enable_interrupts(); } - + unmask_irq(ino); - + return; } @@ -413,7 +356,7 @@ void irq_free_handler(int ino) if (ino>MAX_IRQ) { return; } - + status = disable_interrupts(); mask_irq(ino); if (NULL == irq_table[ino].handler) { @@ -435,33 +378,33 @@ asm ("idt_ptr:\n" static void set_vector(int intnum, void *routine) { - idt[intnum].base_high = (u16)((u32)(routine)>>16); - idt[intnum].base_low = (u16)((u32)(routine)&0xffff); + idt[intnum].base_high = (u16)((u32)(routine)>>16); + idt[intnum].base_low = (u16)((u32)(routine)&0xffff); } int interrupt_init(void) { int i; - + /* Just in case... */ disable_interrupts(); - + /* Initialize the IDT and stuff */ - - + + memset(irq_table, 0, sizeof(irq_table)); /* Setup the IDT */ - for (i=0;i<256;i++) { + for (i=0;i<256;i++) { idt[i].access = 0x8e; - idt[i].res = 0; - idt[i].selector = 0x10; + idt[i].res = 0; + idt[i].selector = 0x10; set_vector(i, default_isr); - } - + } + asm ("cs lidt idt_ptr\n"); - + /* Setup exceptions */ set_vector(0x00, exp_0); set_vector(0x01, exp_1); @@ -514,41 +457,40 @@ int interrupt_init(void) set_vector(0x2e, irq_14); set_vector(0x2f, irq_15); /* vectors 0x30-0x3f are reserved for irq 16-31 */ - set_vector(0x40, syscall_entry); - + /* Mask all interrupts */ outb(0xff, MASTER_PIC + IMR); outb(0xff, SLAVE_PIC + IMR); - + /* Master PIC */ - outb(ICW1_SEL|ICW1_EICW4, MASTER_PIC + ICW1); + outb(ICW1_SEL|ICW1_EICW4, MASTER_PIC + ICW1); outb(0x20, MASTER_PIC + ICW2); /* Place master PIC interrupts at INT20 */ - outb(IR2, MASTER_PIC + ICW3); /* ICW3, One slevc PIC is present */ + outb(IR2, MASTER_PIC + ICW3); /* ICW3, One slevc PIC is present */ outb(ICW4_PM, MASTER_PIC + ICW4); - + for (i=0;i<8;i++) { outb(OCW2_SEOI|i, MASTER_PIC + OCW2); } - + /* Slave PIC */ - outb(ICW1_SEL|ICW1_EICW4, SLAVE_PIC + ICW1); + outb(ICW1_SEL|ICW1_EICW4, SLAVE_PIC + ICW1); outb(0x28, SLAVE_PIC + ICW2); /* Place slave PIC interrupts at INT28 */ outb(0x02, SLAVE_PIC + ICW3); /* Slave ID */ - outb(ICW4_PM, SLAVE_PIC + ICW4); - + outb(ICW4_PM, SLAVE_PIC + ICW4); + for (i=0;i<8;i++) { outb(OCW2_SEOI|i, SLAVE_PIC + OCW2); } - - + + /* enable cascade interrerupt */ outb(0xfb, MASTER_PIC + IMR); outb(0xff, SLAVE_PIC + IMR); - + /* It is now safe to enable interrupts */ - enable_interrupts(); - + enable_interrupts(); + return 0; } @@ -560,9 +502,9 @@ void enable_interrupts(void) int disable_interrupts(void) { long flags; - + asm volatile ("pushfl ; popl %0 ; cli\n" : "=g" (flags) : ); - + return (flags&0x200); /* IE flags is bit 9 */ } @@ -570,9 +512,9 @@ int disable_interrupts(void) #ifdef CFG_RESET_GENERIC void __attribute__ ((regparm(0))) generate_gpf(void); -asm(".globl generate_gpf\n" - "generate_gpf:\n" - "ljmp $0x70, $0x47114711\n"); /* segment 0x70 is an arbitrary segment which does not +asm(".globl generate_gpf\n" + "generate_gpf:\n" + "ljmp $0x70, $0x47114711\n"); /* segment 0x70 is an arbitrary segment which does not * exist */ void reset_cpu(ulong addr) {