X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cpu%2Fmcf532x%2Finterrupts.c;h=d6c82054549dc281f72a84c6fccd2c0d351e3d8f;hb=da01f53404f99db185d196867af79371725d4683;hp=ff50d7ddfb8ecbf1fa185bbef292d5ca8fa3c748;hpb=98c80b462f9532f3ff6a62dd9629023b48627a6d;p=u-boot

diff --git a/cpu/mcf532x/interrupts.c b/cpu/mcf532x/interrupts.c
index ff50d7ddfb..d6c8205454 100644
--- a/cpu/mcf532x/interrupts.c
+++ b/cpu/mcf532x/interrupts.c
@@ -28,7 +28,7 @@
 
 int interrupt_init(void)
 {
-	volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+	volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
 
 	/* Make sure all interrupts are disabled */
 	intp->imrh0 |= 0xFFFFFFFF;
@@ -41,9 +41,9 @@ int interrupt_init(void)
 #if defined(CONFIG_MCFTMR)
 void dtimer_intr_setup(void)
 {
-	volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+	volatile int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
 
-	intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
-	intp->imrh0 &= ~CFG_TMRINTR_MASK;
+	intp->icr0[CONFIG_SYS_TMRINTR_NO] = CONFIG_SYS_TMRINTR_PRI;
+	intp->imrh0 &= ~CONFIG_SYS_TMRINTR_MASK;
 }
 #endif