X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cpu%2Fmicroblaze%2Fstart.S;h=3c027ff9bb1c21eced03fa62e606d5c1f624ba70;hb=19bf91f9628f80a55d4f171df71041574882b3d6;hp=ca3befc24e8ef868432bcf72b5f6b9064dd118d5;hpb=1d10b9e99d1b4a6a880d424ec791cde45cb04614;p=u-boot

diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S
index ca3befc24e..3c027ff9bb 100644
--- a/cpu/microblaze/start.S
+++ b/cpu/microblaze/start.S
@@ -117,3 +117,36 @@ clear_bss:
 3:	/* jumping to board_init */
 	brai	board_init
 1:	bri	1b
+
+/*
+ * Read 16bit little endian
+ */
+	.text
+	.global	in16
+	.ent	in16
+	.align	2
+in16:	lhu	r3, r0, r5
+	bslli	r4, r3, 8
+	bsrli	r3, r3, 8
+	andi	r4, r4, 0xffff
+	or	r3, r3, r4
+	rtsd	r15, 8
+	sext16	r3, r3
+	.end	in16
+
+/*
+ * Write 16bit little endian
+ * first parameter(r5) - address, second(r6) - short value
+ */
+	.text
+	.global	out16
+	.ent	out16
+	.align	2
+out16:	bslli	r3, r6, 8
+	bsrli	r6, r6, 8
+	andi	r3, r3, 0xffff
+	or	r3, r3, r6
+	sh	r3, r0, r5
+	rtsd	r15, 8
+	or	r0, r0, r0
+	.end	out16