X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cpu%2Fmpc83xx%2Fstart.S;h=c1821747917f1d003e0ffb103ba094fedc816f65;hb=c9c101c660b3d1995045c61c7c6041f52b6cf335;hp=fdf9d35e25688e6667a4189dbc96acef2148304a;hpb=70431e8a7393b6b793f77957f95b999fc9a269b8;p=u-boot

diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index fdf9d35e25..c182174791 100644
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -172,11 +172,8 @@ boot_warm: /* time t 5 */
 	/* there and deflate the flash size back to minimal size      */
 	/*------------------------------------------------------------*/
 	bl map_flash_by_law1
-
-	GET_GOT			/* initialize GOT access	*/
-	lwz r4, GOT(_start)
-	addi r4, r4, -EXC_OFF_SYS_RESET
-
+	lis r4, (CFG_MONITOR_BASE)@h
+	ori r4, r4, (CFG_MONITOR_BASE)@l
 	addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET
 	mtlr r5
 	blr
@@ -560,7 +557,7 @@ invalidate_bats:
 	mtspr	IBAT1U, r0
 	mtspr	IBAT2U, r0
 	mtspr	IBAT3U, r0
-#if (CFG_HID2 & HID2_HBE)
+#ifdef CONFIG_HIGH_BATS
 	mtspr   IBAT4U, r0
 	mtspr   IBAT5U, r0
 	mtspr   IBAT6U, r0
@@ -571,7 +568,7 @@ invalidate_bats:
 	mtspr	DBAT1U, r0
 	mtspr	DBAT2U, r0
 	mtspr	DBAT3U, r0
-#if (CFG_HID2 & HID2_HBE)
+#ifdef CONFIG_HIGH_BATS
 	mtspr   DBAT4U, r0
 	mtspr   DBAT5U, r0
 	mtspr   DBAT6U, r0
@@ -658,7 +655,7 @@ setup_bats:
 	mtspr	DBAT3U, r3
 	isync
 
-#if (CFG_HID2 & HID2_HBE)
+#ifdef CONFIG_HIGH_BATS
 	/* IBAT 4 */
 	addis   r4, r0, CFG_IBAT4L@h
 	ori     r4, r4, CFG_IBAT4L@l
@@ -875,8 +872,8 @@ relocate_code:
 	mr	r10, r5		/* Save copy of Destination Address */
 
 	mr	r3,  r5				/* Destination Address */
-	lwz	r4, GOT(_start)
-	addi	r4, r4, -EXC_OFF_SYS_RESET
+	lis	r4, CFG_MONITOR_BASE@h		/* Source      Address */
+	ori	r4, r4, CFG_MONITOR_BASE@l
 	lwz	r5, GOT(__init_end)
 	sub	r5, r5, r4
 	li	r6, CFG_CACHELINE_SIZE		/* Cache Line Size */