X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cpu%2Fmpc85xx%2Fcommproc.c;h=594aace4b12553bf4e7253feef89f648ae505a58;hb=fc38eb98ff226f2c53eecbee033a6ab7619473dc;hp=b0ecd25507bbb4ea6487610e1141796d5b3ce0f1;hpb=6a40ef62c4300e9f606deef0a4618cbc4b514a51;p=u-boot

diff --git a/cpu/mpc85xx/commproc.c b/cpu/mpc85xx/commproc.c
index b0ecd25507..594aace4b1 100644
--- a/cpu/mpc85xx/commproc.c
+++ b/cpu/mpc85xx/commproc.c
@@ -26,7 +26,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_CPM2)
 /*
  * because we have stack and init data in dual port ram
  * we must reduce the size
@@ -37,10 +36,10 @@ DECLARE_GLOBAL_DATA_PTR;
 void
 m8560_cpm_reset(void)
 {
-	volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
+	volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR;
 	volatile ulong count;
 
-	gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
+	gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
 
 	/* Reclaim the DP memory for our use.
 	*/
@@ -64,7 +63,7 @@ m8560_cpm_reset(void)
 uint
 m8560_cpm_dpalloc(uint size, uint align)
 {
-	volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
+	volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR;
 	uint	retloc;
 	uint	align_mask, off;
 	uint	savebase;
@@ -120,7 +119,7 @@ m8560_cpm_hostalloc(uint size, uint align)
 void
 m8560_cpm_setbrg(uint brg, uint rate)
 {
-	volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
+	volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR;
 	volatile uint	*bp;
 
 	/* This is good enough to get SMCs running.....
@@ -142,7 +141,7 @@ m8560_cpm_setbrg(uint brg, uint rate)
 void
 m8560_cpm_fastbrg(uint brg, uint rate, int div16)
 {
-	volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
+	volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR;
 	volatile uint	*bp;
 
 	/* This is good enough to get SMCs running.....
@@ -167,7 +166,7 @@ m8560_cpm_fastbrg(uint brg, uint rate, int div16)
 void
 m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel)
 {
-	volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
+	volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR;
 	volatile uint	*bp;
 
 	if (brg < 4) {
@@ -190,7 +189,7 @@ m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel)
 void post_word_store (ulong a)
 {
 	volatile ulong *save_addr =
-		(volatile ulong *)(CFG_IMMR + CPM_POST_WORD_ADDR);
+		(volatile ulong *)(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR);
 
 	*save_addr = a;
 }
@@ -198,11 +197,9 @@ void post_word_store (ulong a)
 ulong post_word_load (void)
 {
 	volatile ulong *save_addr =
-		(volatile ulong *)(CFG_IMMR + CPM_POST_WORD_ADDR);
+		(volatile ulong *)(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR);
 
 	return *save_addr;
 }
 
 #endif	/* CONFIG_POST */
-
-#endif /* CONFIG_CPM2 */