X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cpu%2Fmpc85xx%2Fmp.c;h=a527cf3047ad76eeb9f1904ab1c6091922554cb0;hb=1730edf76c54381475e2da11f75b1ce563c4e62c;hp=7b10fba0a64413e906aa02f69227db20585f1986;hpb=38b189fe749824ea9b1c5422865e78b4b7eb2494;p=u-boot

diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
index 7b10fba0a6..a527cf3047 100644
--- a/cpu/mpc85xx/mp.c
+++ b/cpu/mpc85xx/mp.c
@@ -103,6 +103,10 @@ int cpu_release(int nr, int argc, char *argv[])
 	}
 
 	table[BOOT_ENTRY_ADDR_UPPER] = (u32)(boot_addr >> 32);
+
+	/* ensure all table updates complete before final address write */
+	eieio();
+
 	table[BOOT_ENTRY_ADDR_LOWER] = (u32)(boot_addr & 0xffffffff);
 
 	return 0;
@@ -153,8 +157,8 @@ static void pq3_mp_up(unsigned long bootpg)
 	/* wait for everyone */
 	while (timeout) {
 		int i;
-		for (i = 1; i < CONFIG_NR_CPUS; i++) {
-			if (table[i * NUM_BOOT_ENTRY])
+		for (i = 0; i < CONFIG_NR_CPUS; i++) {
+			if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER])
 				cpu_up_mask |= (1 << i);
 		};
 
@@ -165,6 +169,10 @@ static void pq3_mp_up(unsigned long bootpg)
 		timeout--;
 	}
 
+	if (timeout == 0)
+		printf("CPU up timeout. CPU up mask is %x should be %x\n",
+			cpu_up_mask, up);
+
 	/* enable time base at the platform */
 	if (whoami)
 		devdisr |= MPC85xx_DEVDISR_TB1;