X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cpu%2Fmpc86xx%2Fcpu.c;h=dc53bee588d46dc10a9fa3f51f4602666e347f7c;hb=a9f3acbcd07da72b5446ce557531a3ed8b8beff0;hp=d83bedd6e0c2aa082016ac7623c6a379f633dde2;hpb=9caeaadf508cd0e11ac5dfc56ab0f72e3b89a105;p=u-boot diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index d83bedd6e0..dc53bee588 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -26,11 +26,11 @@ #include #include #include +#include #include +#include +#include -#if defined(CONFIG_OF_FLAT_TREE) -#include -#endif int checkcpu(void) @@ -39,8 +39,8 @@ checkcpu(void) uint pvr, svr; uint ver; uint major, minor; - uint lcrr; /* local bus clock ratio register */ - uint clkdiv; /* clock divider portion of lcrr */ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + volatile ccsr_gur_t *gur = &immap->im_gur; puts("Freescale PowerPC\n"); @@ -54,8 +54,14 @@ checkcpu(void) switch (ver) { case PVR_VER(PVR_86xx): - puts("E600"); - break; + { + uint msscr0 = mfspr(MSSCR0); + printf("E600 Core %d", (msscr0 & 0x20) ? 1 : 0 ); + if (gur->pordevsr & MPC86xx_PORDEVSR_CORE1TE) + puts("\n Core1Translation Enabled"); + debug(" (MSSCR0=%x, PORDEVSR=%x)", msscr0, gur->pordevsr); + } + break; default: puts("Unknown"); break; @@ -63,7 +69,7 @@ checkcpu(void) printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr); svr = get_svr(); - ver = SVR_VER(svr); + ver = SVR_SOC_VER(svr); major = SVR_MAJ(svr); minor = SVR_MIN(svr); @@ -76,6 +82,9 @@ checkcpu(void) puts("8641"); } break; + case SVR_8610: + puts("8610"); + break; default: puts("Unknown"); break; @@ -89,22 +98,11 @@ checkcpu(void) printf("MPX:%4lu MHz, ", sysinfo.freqSystemBus / 1000000); printf("DDR:%4lu MHz, ", sysinfo.freqSystemBus / 2000000); -#if defined(CFG_LBC_LCRR) - lcrr = CFG_LBC_LCRR; -#else - { - volatile immap_t *immap = (immap_t *) CFG_IMMR; - volatile ccsr_lbc_t *lbc = &immap->im_lbc; - - lcrr = lbc->lcrr; - } -#endif - clkdiv = lcrr & 0x0f; - if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) { - printf("LBC:%4lu MHz\n", - sysinfo.freqSystemBus / 1000000 / clkdiv); + if (sysinfo.freqLocalBus > LCRR_CLKDIV) { + printf("LBC:%4lu MHz\n", sysinfo.freqLocalBus / 1000000); } else { - printf(" LBC: unknown (lcrr: 0x%08x)\n", lcrr); + printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n", + sysinfo.freqLocalBus); } puts(" L2: "); @@ -150,16 +148,16 @@ do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { #if !defined(CONFIG_MPC8641HPCN) && !defined(CONFIG_MPC8610HPCD) -#ifdef CFG_RESET_ADDRESS - ulong addr = CFG_RESET_ADDRESS; +#ifdef CONFIG_SYS_RESET_ADDRESS + ulong addr = CONFIG_SYS_RESET_ADDRESS; #else /* - * note: when CFG_MONITOR_BASE points to a RAM address, - * CFG_MONITOR_BASE - sizeof (ulong) is usually a valid + * note: when CONFIG_SYS_MONITOR_BASE points to a RAM address, + * CONFIG_SYS_MONITOR_BASE - sizeof (ulong) is usually a valid * address. Better pick an address known to be invalid on your - * system and assign it to CFG_RESET_ADDRESS. + * system and assign it to CONFIG_SYS_RESET_ADDRESS. */ - ulong addr = CFG_MONITOR_BASE - sizeof(ulong); + ulong addr = CONFIG_SYS_MONITOR_BASE - sizeof(ulong); #endif /* flush and disable I/D cache */ @@ -204,6 +202,20 @@ get_tbclk(void) void watchdog_reset(void) { +#if defined(CONFIG_MPC8610) + /* + * This actually feed the hard enabled watchdog. + */ + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; + volatile ccsr_wdt_t *wdt = &immap->im_wdt; + volatile ccsr_gur_t *gur = &immap->im_gur; + u32 tmp = gur->pordevsr; + + if (tmp & 0x4000) { + wdt->swsrr = 0x556c; + wdt->swsrr = 0xaa39; + } +#endif } #endif /* CONFIG_WATCHDOG */ @@ -212,7 +224,7 @@ watchdog_reset(void) void dma_init(void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile ccsr_dma_t *dma = &immap->im_dma; dma->satr0 = 0x00040000; @@ -223,7 +235,7 @@ dma_init(void) uint dma_check(void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile ccsr_dma_t *dma = &immap->im_dma; volatile uint status = dma->sr0; @@ -241,7 +253,7 @@ dma_check(void) int dma_xfer(void *dest, uint count, void *src) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile ccsr_dma_t *dma = &immap->im_dma; dma->dar0 = (uint) dest; @@ -257,62 +269,39 @@ dma_xfer(void *dest, uint count, void *src) #endif /* CONFIG_DDR_ECC */ -#ifdef CONFIG_OF_FLAT_TREE -void -ft_cpu_setup(void *blob, bd_t *bd) +/* + * Print out the state of various machine registers. + * Currently prints out LAWs, BR0/OR0, and BATs + */ +void mpc86xx_reginfo(void) { - u32 *p; - ulong clock; - int len; - - clock = bd->bi_busfreq; - p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len); - if (p != NULL) - *p = cpu_to_be32(clock); - - p = ft_get_prop(blob, "/" OF_SOC "/serial@4500/clock-frequency", &len); - if (p != NULL) - *p = cpu_to_be32(clock); - - p = ft_get_prop(blob, "/" OF_SOC "/serial@4600/clock-frequency", &len); - if (p != NULL) - *p = cpu_to_be32(clock); - -#if defined(CONFIG_TSEC1) - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enetaddr, 6); - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/local-mac-address", &len); - if (p) - memcpy(p, bd->bi_enetaddr, 6); -#endif + immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; + ccsr_lbc_t *lbc = &immap->im_lbc; + + print_bats(); + print_laws(); + + printf ("Local Bus Controller Registers\n" + "\tBR0\t0x%08X\tOR0\t0x%08X \n", in_be32(&lbc->br0), in_be32(&lbc->or0)); + printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", in_be32(&lbc->br1), in_be32(&lbc->or1)); + printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", in_be32(&lbc->br2), in_be32(&lbc->or2)); + printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", in_be32(&lbc->br3), in_be32(&lbc->or3)); + printf("\tBR4\t0x%08X\tOR4\t0x%08X \n", in_be32(&lbc->br4), in_be32(&lbc->or4)); + printf("\tBR5\t0x%08X\tOR5\t0x%08X \n", in_be32(&lbc->br5), in_be32(&lbc->or5)); + printf("\tBR6\t0x%08X\tOR6\t0x%08X \n", in_be32(&lbc->br6), in_be32(&lbc->or6)); + printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", in_be32(&lbc->br7), in_be32(&lbc->or7)); -#if defined(CONFIG_TSEC2) - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet1addr, 6); - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/local-mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet1addr, 6); -#endif - -#if defined(CONFIG_TSEC3) - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@26000/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet2addr, 6); - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@26000/local-mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet2addr, 6); -#endif +} -#if defined(CONFIG_TSEC4) - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@27000/mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet3addr, 6); - p = ft_get_prop(blob, "/" OF_SOC "/ethernet@27000/local-mac-address", &len); - if (p != NULL) - memcpy(p, bd->bi_enet3addr, 6); +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() + */ +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_TSEC_ENET) + tsec_standard_init(bis); #endif + return 0; } -#endif