X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cpu%2Fmpc86xx%2Fspeed.c;h=da5b58b73f29441761d0abd430f8d1f19a879103;hb=dbab0691d2533560f7e91b92ae844046a9ad1df3;hp=23161ca8cbed2b084eb75b64dd12fe238a07c7e4;hpb=d4d1e9bee7c45ea8c513d3af697c864107f1c4d1;p=u-boot

diff --git a/cpu/mpc86xx/speed.c b/cpu/mpc86xx/speed.c
index 23161ca8cb..da5b58b73f 100644
--- a/cpu/mpc86xx/speed.c
+++ b/cpu/mpc86xx/speed.c
@@ -31,6 +31,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/* used in some defintiions of CONFIG_SYS_CLK_FREQ */
+extern unsigned long get_board_sys_clk(unsigned long dummy);
+
 void get_sys_info(sys_info_t *sysInfo)
 {
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
@@ -103,6 +106,20 @@ int get_clocks(void)
 	gd->cpu_clk = sys_info.freqProcessor;
 	gd->bus_clk = sys_info.freqSystemBus;
 
+	/*
+	 * The base clock for I2C depends on the actual SOC.  Unfortunately,
+	 * there is no pattern that can be used to determine the frequency, so
+	 * the only choice is to look up the actual SOC number and use the value
+	 * for that SOC. This information is taken from application note
+	 * AN2919.
+	 */
+#ifdef CONFIG_MPC8610
+	gd->i2c1_clk = sys_info.freqSystemBus;
+#else
+	gd->i2c1_clk = sys_info.freqSystemBus / 2;
+#endif
+	gd->i2c2_clk = gd->i2c1_clk;
+
 	if (gd->cpu_clk != 0)
 		return 0;
 	else