X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cpu%2Fmpc8xx%2Fcpu_init.c;h=c79e5780ad3d74d7adc3397837383ffa2298d9e2;hb=8e990cb076a1c77daf3a50cc0df9732135e9eef5;hp=abe62094c826e56bdba464ac6123f8efc4c4d4d7;hpb=4a9cbbe832e1c377d04cfb53e9679844595bc3cf;p=u-boot

diff --git a/cpu/mpc8xx/cpu_init.c b/cpu/mpc8xx/cpu_init.c
index abe62094c8..c79e5780ad 100644
--- a/cpu/mpc8xx/cpu_init.c
+++ b/cpu/mpc8xx/cpu_init.c
@@ -27,6 +27,10 @@
 #include <mpc8xx.h>
 #include <commproc.h>
 
+#if defined(CFG_RTCSC) || defined(CFG_RMDS)
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
 #if defined(CFG_I2C_UCODE_PATCH) || defined(CFG_SPI_UCODE_PATCH)
 void cpm_load_patch (volatile immap_t * immr);
 #endif
@@ -42,8 +46,11 @@ void cpu_init_f (volatile immap_t * immr)
 {
 #ifndef CONFIG_MBX
 	volatile memctl8xx_t *memctl = &immr->im_memctl;
-	ulong reg;
+# ifdef CFG_PLPRCR
+	ulong mfmask;
+# endif
 #endif
+	ulong reg;
 
 	/* SYPCR - contains watchdog control (11-9) */
 
@@ -54,9 +61,11 @@ void cpu_init_f (volatile immap_t * immr)
 #endif /* CONFIG_WATCHDOG */
 
 	/* SIUMCR - contains debug pin configuration (11-6) */
-
+#ifndef CONFIG_SVM_SC8xx
 	immr->im_siu_conf.sc_siumcr |= CFG_SIUMCR;
-
+#else
+	immr->im_siu_conf.sc_siumcr = CFG_SIUMCR;
+#endif
 	/* initialize timebase status and control register (11-26) */
 	/* unlock TBSCRK */
 
@@ -68,6 +77,14 @@ void cpu_init_f (volatile immap_t * immr)
 	immr->im_sitk.sitk_piscrk = KAPWR_KEY;
 	immr->im_sit.sit_piscr = CFG_PISCR;
 
+	/* System integration timers. Don't change EBDF! (15-27) */
+
+	immr->im_clkrstk.cark_sccrk = KAPWR_KEY;
+	reg = immr->im_clkrst.car_sccr;
+	reg &= SCCR_MASK;
+	reg |= CFG_SCCR;
+	immr->im_clkrst.car_sccr = reg;
+
 	/* PLL (CPU clock) settings (15-30) */
 
 	immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
@@ -76,25 +93,26 @@ void cpu_init_f (volatile immap_t * immr)
 
 	/* If CFG_PLPRCR (set in the various *_config.h files) tries to
 	 * set the MF field, then just copy CFG_PLPRCR over car_plprcr,
-	 * otherwise OR in CFG_PLPRCR so we do not change the currentMF
+	 * otherwise OR in CFG_PLPRCR so we do not change the current MF
 	 * field value.
+	 *
+	 * For newer (starting MPC866) chips PLPRCR layout is different.
 	 */
-#if ((CFG_PLPRCR & PLPRCR_MF_MSK) != 0)
-	reg = CFG_PLPRCR;			/* reset control bits   */
-#else
-	reg = immr->im_clkrst.car_plprcr;
-	reg &= PLPRCR_MF_MSK;			/* isolate MF field */
-	reg |= CFG_PLPRCR;			/* reset control bits   */
-#endif
+#ifdef CFG_PLPRCR
+	if (get_immr(0xFFFF) >= MPC8xx_NEW_CLK)
+	   mfmask = PLPRCR_MFACT_MSK;
+	else
+	   mfmask = PLPRCR_MF_MSK;
+
+	if ((CFG_PLPRCR & mfmask) != 0)
+	   reg = CFG_PLPRCR;			/* reset control bits   */
+	else {
+	   reg = immr->im_clkrst.car_plprcr;
+	   reg &= mfmask;			/* isolate MF-related fields */
+	   reg |= CFG_PLPRCR;			/* reset control bits   */
+	}
 	immr->im_clkrst.car_plprcr = reg;
-
-	/* System integration timers. Don't change EBDF! (15-27) */
-
-	immr->im_clkrstk.cark_sccrk = KAPWR_KEY;
-	reg = immr->im_clkrst.car_sccr;
-	reg &= SCCR_MASK;
-	reg |= CFG_SCCR;
-	immr->im_clkrst.car_sccr = reg;
+#endif
 
 	/*
 	 * Memory Controller:
@@ -140,10 +158,11 @@ void cpu_init_f (volatile immap_t * immr)
     defined(CONFIG_MHPC)	|| \
     defined(CONFIG_PCU_E)	|| \
     defined(CONFIG_R360MPI)	|| \
+    defined(CONFIG_RMU)		|| \
     defined(CONFIG_RPXCLASSIC)	|| \
     defined(CONFIG_RPXLITE)	|| \
-    defined(CONFIG_SPD823TS)	|| \
-   (defined(CONFIG_MPC860T) && defined(CONFIG_FADS))
+    defined(CONFIG_SPC1920)	|| \
+    defined(CONFIG_SPD823TS)
 
 	memctl->memc_br0 = CFG_BR0_PRELIM;
 #endif
@@ -225,6 +244,10 @@ void cpu_init_f (volatile immap_t * immr)
 	rpxclassic_init ();
 #endif
 
+#if defined(CONFIG_RPXLITE) && defined(CFG_ENV_IS_IN_NVRAM)
+	rpxlite_init ();
+#endif
+
 #ifdef CFG_RCCR			/* must be done before cpm_load_patch() */
 	/* write config value */
 	immr->im_cpm.cp_rccr = CFG_RCCR;
@@ -241,8 +264,6 @@ void cpu_init_f (volatile immap_t * immr)
 int cpu_init_r (void)
 {
 #if defined(CFG_RTCSC) || defined(CFG_RMDS)
-	DECLARE_GLOBAL_DATA_PTR;
-
 	bd_t *bd = gd->bd;
 	volatile immap_t *immr = (volatile immap_t *) (bd->bi_immr_base);
 #endif