X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=cpu%2Fppc4xx%2Fusb.c;h=cb8d5c7d30f631ff8b0223f1c664d3df18ce89b0;hb=ce0eb70333331da6942167c41e6841c8c7994a33;hp=2837b37c58e530f6e6002ba5915970d0deaeaf54;hpb=c4e2753436bf8ed42731c5b8b9ceb62cdb482f43;p=u-boot

diff --git a/cpu/ppc4xx/usb.c b/cpu/ppc4xx/usb.c
index 2837b37c58..cb8d5c7d30 100644
--- a/cpu/ppc4xx/usb.c
+++ b/cpu/ppc4xx/usb.c
@@ -25,25 +25,41 @@
 
 #if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
 
+#ifdef CONFIG_4xx_DCACHE
+#include <asm/mmu.h>
+DECLARE_GLOBAL_DATA_PTR;
+#endif
+
 #include "usbdev.h"
 
-int usb_cpu_init()
+int usb_cpu_init(void)
 {
+#ifdef CONFIG_4xx_DCACHE
+	/* disable cache */
+	change_tlb(gd->bd->bi_memstart, gd->bd->bi_memsize, TLB_WORD2_I_ENABLE);
+#endif
 
 #if defined(CONFIG_440EP) || defined(CONFIG_440EPX)
 	usb_dev_init();
 #endif
-
 	return 0;
 }
 
-int usb_cpu_stop()
+int usb_cpu_stop(void)
 {
+#ifdef CONFIG_4xx_DCACHE
+	/* enable cache */
+	change_tlb(gd->bd->bi_memstart, gd->bd->bi_memsize, 0);
+#endif
 	return 0;
 }
 
-int usb_cpu_init_fail()
+int usb_cpu_init_fail(void)
 {
+#ifdef CONFIG_4xx_DCACHE
+	/* enable cache */
+	change_tlb(gd->bd->bi_memstart, gd->bd->bi_memsize, 0);
+#endif
 	return 0;
 }