X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=doc%2FREADME.arm-caches;h=f6a52e3e386cdb0df06daf695a975ee6c8f5f9df;hb=7c7e280aa6766ac34c6dbf4a5a2c6b14554ccc3f;hp=cd2b4587c2856175a047aab91bfd6d43bab0f9a0;hpb=684cad5717ea5887a09f3c67732a17774a658b34;p=u-boot

diff --git a/doc/README.arm-caches b/doc/README.arm-caches
index cd2b4587c2..f6a52e3e38 100644
--- a/doc/README.arm-caches
+++ b/doc/README.arm-caches
@@ -40,6 +40,8 @@ Buffer Requirements:
 - If the buffer is not cache-line aligned invalidation will be restricted
   to the aligned part. That is, one cache-line at the respective boundary
   may be left out while doing invalidation.
+- A suitable buffer can be alloced on the stack using the
+  ALLOC_CACHE_ALIGN_BUFFER macro.
 
 Cleanup Before Linux:
 - cleanup_before_linux() should flush the D-cache, invalidate I-cache, and