X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=doc%2FREADME.fsl-esdhc;h=29cc6619eaba7a5caaee80709f04897a6030ceca;hb=a1b73c18724eb8cb75f7a60d851578d933c78095;hp=619c6b2d07bcab8bd2486748ad3b5028059659b9;hpb=1c6f6a6ef9f3edf38360a204bc62de83a8039df3;p=u-boot

diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc
index 619c6b2d07..29cc6619ea 100644
--- a/doc/README.fsl-esdhc
+++ b/doc/README.fsl-esdhc
@@ -1,6 +1,22 @@
-CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode.
-CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode.
-CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT forces to run at 1.8V.
+Freescale esdhc-specific options
 
-Accessing ESDHC registers can be determined by ESDHC IP's endian
-mode or processor's endian mode.
+	- CONFIG_FSL_ESDHC_ADAPTER_IDENT
+		Support Freescale adapter card type identification. This is implemented by
+		operating Qixis FPGA relevant registers. The STAT_PRES1 register has SDHC
+		Card ID[0:2] bits showing the type of card installed in the SDHC Adapter Slot.
+
+		SDHC Card ID[0:2]	Adapter Card Type
+		0b000			reserved
+		0b001			eMMC Card Rev4.5
+		0b010			SD/MMC Legacy Card
+		0b011			eMMC Card Rev4.4
+		0b100			reserved
+		0b101			MMC Card
+		0b110			SD Card Rev2.0/3.0
+		0b111			No card is present
+	- CONFIG_SYS_FSL_ESDHC_LE
+		ESDHC IP is in little-endian mode. Accessing ESDHC registers can be
+		determined by ESDHC IP's endian mode or processor's endian mode.
+	- CONFIG_SYS_FSL_ESDHC_BE
+		ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined
+		by ESDHC IP's endian mode or processor's endian mode.