X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=doc%2FREADME.imx5;h=ea0e144cedcf2074a4752e8d1f03a7b9681ae78b;hb=a4092dbd81ad8bcd7d405304f579b0b5b0c402ce;hp=f7eab7d4b2ea1d11eae0b1437c951661ec56f14c;hpb=684cad5717ea5887a09f3c67732a17774a658b34;p=u-boot

diff --git a/doc/README.imx5 b/doc/README.imx5
index f7eab7d4b2..ea0e144ced 100644
--- a/doc/README.imx5
+++ b/doc/README.imx5
@@ -15,3 +15,26 @@ i.MX5x SoCs.
     mode), which causes the effect of this failure to be much lower (in terms
     of frequency deviation), avoiding system failure, or at least decreasing
     the likelihood of system failure.
+
+1.2 CONFIG_SYS_MAIN_PWR_ON: Trigger MAIN_PWR_ON upon startup.
+    This option should be enabled for boards having a SYS_ON_OFF_CTL signal
+    connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
+    reference designs.
+
+2. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+2.1 MAC Address: It is stored in the words 9 to 14 of fuse bank 1, using the
+    natural MAC byte order (i.e. MSB first).
+
+    This is an example how to program an example MAC address 01:23:45:67:89:ab
+    into the eFuses. Assure that the programming voltage is available and then
+    execute:
+
+    => fuse prog -y 1 9 01 23 45 67 89 ab
+
+    After programming a MAC address, consider locking the MAC fuses. This is
+    done by programming the MAC_ADDR_LOCK fuse, which is bit 4 of word 0 in
+    bank 1:
+
+    => fuse prog -y 1 0 10