X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=doc%2FREADME.mips;h=b28f6285ccbc5ffb7eaece5e351da628d9420763;hb=7a7081e6f308bc510c22da3d078b42a46ea72192;hp=f4f770b99fb281333a6cc3a5e4f848f7a6566969;hpb=951c6baaf44c7fd4335b75fb92840d4e42c94927;p=u-boot

diff --git a/doc/README.mips b/doc/README.mips
index f4f770b99f..b28f6285cc 100644
--- a/doc/README.mips
+++ b/doc/README.mips
@@ -39,8 +39,6 @@ TODOs
 
   * Secondary cache support missing
 
-  * Centralize the link directive files
-
   * Initialize TLB entries redardless of their use
 
   * R2000/R3000 class parts are not supported
@@ -51,8 +49,6 @@ TODOs
     initialized in board specific assembler language before the cache init
     code is run -- that is, initialize the DRAM in lowlevel_init().
 
-  * get rid of CONFIG_MANUAL_RELOC
-
   * centralize/share more CPU code of MIPS32, MIPS64 and XBurst
 
   * support Qemu Malta