X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=doc%2FREADME.nand-boot-ppc440;h=1e9c102644b2a671bf6be70e5d13b5d6e80909ae;hb=9b986fdd92217ca567d7498c5063b5102f6b9e52;hp=a1c1d8c4447abac7bb5590aa3065504e87bacf43;hpb=504b5cd0e2e7b58c6265fb684a850a158c85e1b2;p=u-boot

diff --git a/doc/README.nand-boot-ppc440 b/doc/README.nand-boot-ppc440
index a1c1d8c444..1e9c102644 100644
--- a/doc/README.nand-boot-ppc440
+++ b/doc/README.nand-boot-ppc440
@@ -9,7 +9,7 @@ The PPC440EP(x)/GR(x) cpu's can boot directly from NAND FLASH,
 completely without NOR FLASH. This can be done by using the NAND
 boot feature of the 440 NAND flash controller (NDFC).
 
-Here a short desciption of the different boot stages:
+Here a short description of the different boot stages:
 
 a) IPL (Initial Program Loader, integrated inside CPU)
 ------------------------------------------------------