X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=doc%2FREADME.omap3;h=e09ac032c0f5675930fa90fe9f00a47a8c1112b9;hb=HEAD;hp=9ab09793ec8026229c43019003ab1b036c924ded;hpb=376aee78dd66ae0dc4ce496cbe93ecc80aaad48e;p=u-boot

diff --git a/doc/README.omap3 b/doc/README.omap3
index 9ab09793ec..e09ac032c0 100644
--- a/doc/README.omap3
+++ b/doc/README.omap3
@@ -21,6 +21,8 @@ Currently the following boards are supported:
 
 * TI/Logic PD Zoom 2 [7]
 
+* CompuLab Ltd. CM-T35 [8]
+
 Toolchain
 =========
 
@@ -61,6 +63,12 @@ make
 make omap3_zoom2_config
 make
 
+* CM-T35:
+
+make cm_t35_config
+make
+
+
 Custom commands
 ===============
 
@@ -84,10 +92,87 @@ For all other commands see
 
 help
 
+Interfaces
+==========
+
+gpio
+----
+
+To set a bit :
+
+	if (!gpio_request(N, "")) {
+		gpio_direction_output(N, 0);
+		gpio_set_value(N, 1);
+	}
+
+To clear a bit :
+
+	if (!gpio_request(N, "")) {
+		gpio_direction_output(N, 0);
+		gpio_set_value(N, 0);
+	}
+
+To read a bit :
+
+	if (!gpio_request(N, "")) {
+		gpio_direction_input(N);
+		val = gpio_get_value(N);
+		gpio_free(N);
+	}
+	if (val)
+		printf("GPIO N is set\n");
+	else
+		printf("GPIO N is clear\n");
+
+dma
+---
+void omap3_dma_init(void)
+	Init the DMA module
+int omap3_dma_get_conf_chan(uint32_t chan, struct dma4_chan *config);
+	Read config of the channel
+int omap3_dma_conf_chan(uint32_t chan, struct dma4_chan *config);
+	Write config to the channel
+int omap3_dma_conf_transfer(uint32_t chan, uint32_t *src, uint32_t *dst,
+		uint32_t sze)
+	Config source, destination and size of a transfer
+int omap3_dma_wait_for_transfer(uint32_t chan)
+	Wait for a transfer to end - this hast to be called before a channel
+	or the data the channel transferd are used.
+int omap3_dma_get_revision(uint32_t *minor, uint32_t *major)
+	Read silicon Revision of the DMA module
+
+NAND
+====
+
+There are some OMAP3 devices out there with NAND attached. Due to the fact that
+OMAP3 ROM code can only handle 1-bit hamming ECC for accessing first page
+(place where SPL lives) we require this setup for u-boot at least when reading
+the second progam within SPL.  A lot of newer NAND chips however require more
+than 1-bit ECC for the pages, some can live with 1-bit for the first page. To
+handle this we can switch to another ECC algorithm after reading the payload
+within SPL.
+
+BCH8
+----
+
+To enable hardware assisted BCH8 (8-bit BCH [Bose, Chaudhuri, Hocquenghem]) on
+OMAP3 devices we can use the BCH library in lib/bch.c. To do so add CONFIG_BCH
+and set CONFIG_NAND_OMAP_ECCSCHEME=5 (refer README.nand) for selecting BCH8_SW.
+The NAND OOB layout is the same as in linux kernel, if the linux kernel BCH8
+implementation for OMAP3 works for you so the u-boot version should also.
+When you require the SPL to read with BCH8 there are two more configs to
+change:
+
+ * CONFIG_SYS_NAND_ECCPOS (must be the same as .eccpos in
+   GPMC_NAND_HW_BCH8_ECC_LAYOUT defined in
+   arch/arm/include/asm/arch-omap3/omap_gpmc.h)
+ * CONFIG_SYS_NAND_ECCSIZE must be 512
+ * CONFIG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
+
 Acknowledgements
 ================
 
-OMAP3 U-Boot is based on U-Boot tar ball [8] for BeagleBoard and EVM done by
+OMAP3 U-Boot is based on U-Boot tar ball [9] for BeagleBoard and EVM done by
 several TI employees.
 
 Links
@@ -121,7 +206,11 @@ http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit
 [7] TI/Logic PD Zoom 2
 
 http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf
-[8] TI OMAP3 U-Boot:
 
-http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz
+[8] CompuLab Ltd. CM-T35:
+
+http://www.compulab.co.il/t3530/html/t3530-cm-datasheet.htm
 
+[9] TI OMAP3 U-Boot:
+
+http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz