X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=doc%2FREADME.uniphier;h=bce70cf5fe433ecb64e77b21f4973658a695f788;hb=69a00875e3db178cfcb19ea8ab97c8927a11e593;hp=6ba0320f4f48776f395da6058903ff025426a9d2;hpb=d0f30211e9823694c1c2c79f471dbe9d498a40fd;p=u-boot diff --git a/doc/README.uniphier b/doc/README.uniphier index 6ba0320f4f..bce70cf5fe 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -28,34 +28,38 @@ Tested toolchains Compile the source ------------------ -PH1-sLD3: - $ make ph1_sld3_defconfig +PH1-sLD3 reference board: + $ make uniphier_sld3_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- -PH1-LD4: - $ make ph1_ld4_defconfig +PH1-LD4 reference board: + $ make uniphier_ld4_sld8_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- -PH1-Pro4: - $ make ph1_pro4_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabi- +PH1-sLD8 reference board: + $ make uniphier_ld4_sld8_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-sld8-ref -PH1-sLD8: - $ make ph1_sld8_defconfig +PH1-Pro4 reference board: + $ make uniphier_pro4_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- -PH1-Pro5: - $ make ph1_pro5_defconfig +PH1-Pro5 4KBOX Board: + $ make uniphier_pro5_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- -ProXstream2: - $ make pxs2_defconfig - $ make CROSS_COMPILE=arm-linux-gnueabi- +ProXstream2 Gentil board: + $ make uniphier_pxs2_ld6b_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-proxstream2-gentil -PH1-LD6b: - $ make ph1_ld6b_defconfig +ProXstream2 Vodka board: + $ make uniphier_pxs2_ld6b_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- +PH1-LD6b reference board: + $ make uniphier_pxs2_ld6b_defconfig + $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld6b-ref + You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-" to use your favorite compiler. @@ -115,7 +119,7 @@ The recommended bit switch settings are as follows: SW8 OFF(1)/ON(0) Description ------------------------------------------ - bit 1 ----> CS1_SPLIT + bit 1 <---- CS1_SPLIT bit 2 <---- CASE9_ON bit 3 <---- CASE10_ON bit 4 Don't Care Reserve @@ -129,10 +133,10 @@ as follows: BKSZ Description RAM slot Peripherals -------------------------------------------------------------------- - 0b00 15MB RAM / 1MB Peri 00000000-0effffff 0f000000-0fffffff - 0b01 31MB RAM / 1MB Peri 00000000-1effffff 1f000000-1fffffff - 0b10 64MB RAM / 1MB Peri 00000000-3effffff 3f000000-3fffffff - 0b11 127MB RAM / 1MB Peri 00000000-7effffff 7f000000-7fffffff + 0b00 15MB RAM / 1MB Peri 00000000-00efffff 00f00000-00ffffff + 0b01 31MB RAM / 1MB Peri 00000000-01efffff 01f00000-01ffffff + 0b10 64MB RAM / 1MB Peri 00000000-03efffff 03f00000-03ffffff + 0b11 127MB RAM / 1MB Peri 00000000-07efffff 07f00000-07ffffff Set BSKZ[1:0] to 0b01 for U-Boot. This mode is the most handy because EA[24] is always supported by the save pin