X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=doc%2FREADME.zynq;h=b89c39edac18c169d66f234e07414a04fc58bde6;hb=896d2e82e6d408f6885ae000b707710e0f1a17fc;hp=043c9701409026f7793cdbfc0450462fc094390a;hpb=10a147bc665367111920be657409a5d56d3c0590;p=u-boot

diff --git a/doc/README.zynq b/doc/README.zynq
index 043c970140..b89c39edac 100644
--- a/doc/README.zynq
+++ b/doc/README.zynq
@@ -17,9 +17,8 @@ Xilinx Zynq-7000 All Programmable SoCs enable extensive system level
 differentiation, integration, and flexibility through hardware, software,
 and I/O programmability.
 
-* zc70x
-  - zc702 (single qspi, gem0, mmc) [1]
-  - zc706 (dual parallel qspi, gem0, mmc) [2]
+* zc702 (single qspi, gem0, mmc) [1]
+* zc706 (dual parallel qspi, gem0, mmc) [2]
 * zed (single qspi, gem0, mmc) [3]
 * microzed (single qspi, gem0, mmc) [4]
 * zc770
@@ -30,16 +29,10 @@ and I/O programmability.
 
 3. Building
 
- # Configure for zc70x board
-   $ make zynq_zc70x_config
-     Configuring for zynq_zc70x board...
-
- # Building default dts for zc702 board
+ ex. configure and build for zc702 board
+   $ make zynq_zc702_config
    $ make
 
- # Building specified dts for zc706 board
-   $ make DEVICE_TREE=zynq-zc706
-
 4. Bootmode
 
 Zynq has a facility to read the bootmode from the slcr bootmode register