X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fbios_emulator%2Fbios.c;h=77c7f94bc63e1998f959f8c3bdf6ad6c46ef70c1;hb=b7e4dadfd95cecb9ba3fc1a5e4d7b0d5eeb57ad5;hp=dd4c0a4f322fbdf4d7d81df090084143e9bfb956;hpb=e3bf81b1e841ecabe7c8b3d48621256db8b8623e;p=u-boot diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c index dd4c0a4f32..77c7f94bc6 100644 --- a/drivers/bios_emulator/bios.c +++ b/drivers/bios_emulator/bios.c @@ -185,12 +185,21 @@ static void X86API int1A(int unused) case 0xB103: /* Find PCI class code */ M.x86.R_AH = DEVICE_NOT_FOUND; #ifdef __KERNEL__ +#ifdef CONFIG_DM_PCI + dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG, + &interface); + dm_pci_read_config8(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE, + &subclass); + dm_pci_read_config8(_BE_env.vgaInfo.pcidev, + PCI_CLASS_DEVICE + 1, &baseclass); +#else pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG, &interface); pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE, &subclass); pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE + 1, &baseclass); +#endif if (M.x86.R_CL == interface && M.x86.R_CH == subclass && (u8) (M.x86.R_ECX >> 16) == baseclass) { #else @@ -209,8 +218,13 @@ static void X86API int1A(int unused) if (M.x86.R_BX == pciSlot) { M.x86.R_AH = SUCCESSFUL; #ifdef __KERNEL__ +# ifdef CONFIG_DM_PCI + dm_pci_read_config8(_BE_env.vgaInfo.pcidev, M.x86.R_DI, + &M.x86.R_CL); +# else pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI, &M.x86.R_CL); +# endif #else M.x86.R_CL = (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE, @@ -224,8 +238,13 @@ static void X86API int1A(int unused) if (M.x86.R_BX == pciSlot) { M.x86.R_AH = SUCCESSFUL; #ifdef __KERNEL__ +# ifdef CONFIG_DM_PCI + dm_pci_read_config16(_BE_env.vgaInfo.pcidev, M.x86.R_DI, + &M.x86.R_CX); +# else pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI, &M.x86.R_CX); +# endif #else M.x86.R_CX = (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD, @@ -239,8 +258,13 @@ static void X86API int1A(int unused) if (M.x86.R_BX == pciSlot) { M.x86.R_AH = SUCCESSFUL; #ifdef __KERNEL__ +# ifdef CONFIG_DM_PCI + dm_pci_read_config32(_BE_env.vgaInfo.pcidev, + M.x86.R_DI, &M.x86.R_ECX); +# else pci_read_config_dword(_BE_env.vgaInfo.pcidev, M.x86.R_DI, &M.x86.R_ECX); +# endif #else M.x86.R_ECX = (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD, @@ -254,8 +278,13 @@ static void X86API int1A(int unused) if (M.x86.R_BX == pciSlot) { M.x86.R_AH = SUCCESSFUL; #ifdef __KERNEL__ +# ifdef CONFIG_DM_PCI + dm_pci_write_config8(_BE_env.vgaInfo.pcidev, + M.x86.R_DI, M.x86.R_CL); +# else pci_write_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI, M.x86.R_CL); +# endif #else PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE, _BE_env.vgaInfo.pciInfo); @@ -268,8 +297,13 @@ static void X86API int1A(int unused) if (M.x86.R_BX == pciSlot) { M.x86.R_AH = SUCCESSFUL; #ifdef __KERNEL__ +# ifdef CONFIG_DM_PCI + dm_pci_write_config32(_BE_env.vgaInfo.pcidev, + M.x86.R_DI, M.x86.R_CX); +# else pci_write_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI, M.x86.R_CX); +# endif #else PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD, _BE_env.vgaInfo.pciInfo); @@ -282,8 +316,13 @@ static void X86API int1A(int unused) if (M.x86.R_BX == pciSlot) { M.x86.R_AH = SUCCESSFUL; #ifdef __KERNEL__ +# ifdef CONFIG_DM_PCI + dm_pci_write_config32(_BE_env.vgaInfo.pcidev, + M.x86.R_DI, M.x86.R_ECX); +# else pci_write_config_dword(_BE_env.vgaInfo.pcidev, M.x86.R_DI, M.x86.R_ECX); +# endif #else PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD, _BE_env.vgaInfo.pciInfo);