X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fblock%2Fsym53c8xx.c;h=6f1ac857230ef93cf78e6b17e472d58eb6493eef;hb=2591fbdba3bbae92366d0a4f20fbaf4aa0f9f65c;hp=b880435f1ecf1d170cb226c195c6bbdbc45bcd22;hpb=d0ff51ba5d0309dbe9e25ea54f8a0285a6d5db90;p=u-boot

diff --git a/drivers/block/sym53c8xx.c b/drivers/block/sym53c8xx.c
index b880435f1e..6f1ac85723 100644
--- a/drivers/block/sym53c8xx.c
+++ b/drivers/block/sym53c8xx.c
@@ -2,23 +2,7 @@
  * (C) Copyright 2001
  * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  * partly derived from
  * linux/drivers/scsi/sym53c8xx.c
  *
@@ -35,8 +19,6 @@
 
 #include <common.h>
 
-#ifdef CONFIG_SCSI_SYM53C8XX
-
 #include <command.h>
 #include <pci.h>
 #include <asm/processor.h>
@@ -266,7 +248,7 @@ void scsi_print_error (ccb * pccb)
 
 /******************************************************************************
  * sets-up the SCSI controller
- * the base memory address is retrived via the pci_read_config_dword
+ * the base memory address is retrieved via the pci_read_config_dword
  */
 void scsi_low_level_init(int busdevfunc)
 {
@@ -428,7 +410,7 @@ void scsi_bus_reset(void)
 {
 	unsigned char t;
 	int i;
-	int end = CFG_SCSI_SPIN_UP_TIME*1000;
+	int end = CONFIG_SYS_SCSI_SPIN_UP_TIME*1000;
 
 	t=scsi_read_byte(SCNTL1);
 	scsi_write_byte(SCNTL1,(t | CRST));
@@ -455,11 +437,9 @@ void scsi_int_enable(void)
 
 void scsi_write_dsp(unsigned long start)
 {
-	unsigned long val;
 #ifdef SCSI_SINGLE_STEP
 	unsigned char t;
 #endif
-	val = start;
 	out32r(scsi_mem_addr + DSP,start);
 #ifdef SCSI_SINGLE_STEP
 	t=scsi_read_byte(DCNTL);
@@ -768,9 +748,9 @@ int scsi_exec(ccb *pccb)
 retry:
 	scsi_issue(pccb);
 	if(pccb->contr_stat!=SIR_COMPLETE)
-		return FALSE;
+		return false;
 	if(pccb->status==S_GOOD)
-		return TRUE;
+		return true;
 	if(pccb->status==S_CHECK_COND) { /* check condition */
 		for(i=0;i<16;i++)
 			tmpcmd[i]=pccb->cmd[i];
@@ -801,12 +781,12 @@ retry:
 			case SENSE_NO_SENSE:
 			case SENSE_RECOVERED_ERROR:
 				/* seems to be ok */
-				return TRUE;
+				return true;
 				break;
 			case SENSE_NOT_READY:
 				if((pccb->sense_buf[12]!=0x04)||(pccb->sense_buf[13]!=0x01)) {
 					/* if device is not in process of becoming ready */
-					return FALSE;
+					return false;
 					break;
 				} /* else fall through */
 			case SENSE_UNIT_ATTENTION:
@@ -818,13 +798,13 @@ retry:
 					goto retry;
 				}
 				PRINTF("Target %d not ready, %d retried\n",pccb->target,retrycnt);
-				return FALSE;
+				return false;
 			default:
-				return FALSE;
+				return false;
 		}
 	}
 	PRINTF("Status = %X\n",pccb->status);
-	return FALSE;
+	return false;
 }
 
 
@@ -838,10 +818,10 @@ void scsi_chip_init(void)
 	scsi_write_byte(SCNTL0,0xC0); /* full arbitration no start, no message, parity disabled, master */
 	scsi_write_byte(SCNTL1,0x00);
 	scsi_write_byte(SCNTL2,0x00);
-#ifndef CFG_SCSI_SYM53C8XX_CCF    /* config value for none 40 mhz clocks */
+#ifndef CONFIG_SYS_SCSI_SYM53C8XX_CCF    /* config value for none 40 MHz clocks */
 	scsi_write_byte(SCNTL3,0x13); /* synchronous clock 40/4=10MHz, asynchronous 40MHz */
 #else
-	scsi_write_byte(SCNTL3,CFG_SCSI_SYM53C8XX_CCF); /* config value for none 40 mhz clocks */
+	scsi_write_byte(SCNTL3,CONFIG_SYS_SCSI_SYM53C8XX_CCF); /* config value for none 40 MHz clocks */
 #endif
 	scsi_write_byte(SCID,0x47); /* ID=7, enable reselection */
 	scsi_write_byte(SXFER,0x00); /* synchronous transfer period 10MHz, asynchronous */
@@ -870,6 +850,3 @@ void scsi_chip_init(void)
 #endif
 }
 #endif
-
-
-#endif /* CONFIG_SCSI_SYM53C8XX */