X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fblock%2Fsystemace.c;h=bf29cbbb7a838b4db49b323a9db06942a07fc1ea;hb=0c669fd17a9d8452f70369474925a91139e3005d;hp=e8dff0acf6c0a9dd76e5dfed17a78603b3873fcc;hpb=f82642e33899766892499b163e60560fbbf87773;p=u-boot

diff --git a/drivers/block/systemace.c b/drivers/block/systemace.c
index e8dff0acf6..bf29cbbb7a 100644
--- a/drivers/block/systemace.c
+++ b/drivers/block/systemace.c
@@ -51,27 +51,39 @@
  * to be the base address for the chip, usually in the local
  * peripheral bus.
  */
-#if (CONFIG_SYS_SYSTEMACE_WIDTH == 8)
+
+static u32 base = CONFIG_SYS_SYSTEMACE_BASE;
+static u32 width = CONFIG_SYS_SYSTEMACE_WIDTH;
+
+static void ace_writew(u16 val, unsigned off)
+{
+	if (width == 8) {
 #if !defined(__BIG_ENDIAN)
-#define ace_readw(off) ((readb(CONFIG_SYS_SYSTEMACE_BASE+off)<<8) | \
-			(readb(CONFIG_SYS_SYSTEMACE_BASE+off+1)))
-#define ace_writew(val, off) {writeb(val>>8, CONFIG_SYS_SYSTEMACE_BASE+off); \
-			      writeb(val, CONFIG_SYS_SYSTEMACE_BASE+off+1);}
+		writeb(val >> 8, base + off);
+		writeb(val, base + off + 1);
 #else
-#define ace_readw(off) ((readb(CONFIG_SYS_SYSTEMACE_BASE+off)) | \
-			(readb(CONFIG_SYS_SYSTEMACE_BASE+off+1)<<8))
-#define ace_writew(val, off) {writeb(val, CONFIG_SYS_SYSTEMACE_BASE+off); \
-			      writeb(val>>8, CONFIG_SYS_SYSTEMACE_BASE+off+1);}
+		writeb(val, base + off);
+		writeb(val >> 8, base + off + 1);
 #endif
+	} else
+		out16(base + off, val);
+}
+
+static u16 ace_readw(unsigned off)
+{
+	if (width == 8) {
+#if !defined(__BIG_ENDIAN)
+		return (readb(base + off) << 8) | readb(base + off + 1);
 #else
-#define ace_readw(off) (in16(CONFIG_SYS_SYSTEMACE_BASE+off))
-#define ace_writew(val, off) (out16(CONFIG_SYS_SYSTEMACE_BASE+off,val))
+		return readb(base + off) | (readb(base + off + 1) << 8);
 #endif
+	}
 
-/* */
+	return in16(base + off);
+}
 
 static unsigned long systemace_read(int dev, unsigned long start,
-				    unsigned long blkcnt, void *buffer);
+					lbaint_t blkcnt, void *buffer);
 
 static block_dev_desc_t systemace_dev = { 0 };
 
@@ -104,6 +116,7 @@ static void release_cf_lock(void)
 	ace_writew((val & 0xffff), 0x18);
 }
 
+#ifdef CONFIG_PARTITIONS
 block_dev_desc_t *systemace_get_dev(int dev)
 {
 	/* The first time through this, the systemace_dev object is
@@ -120,7 +133,7 @@ block_dev_desc_t *systemace_get_dev(int dev)
 		/*
 		 * Ensure the correct bus mode (8/16 bits) gets enabled
 		 */
-		ace_writew(CONFIG_SYS_SYSTEMACE_WIDTH == 8 ? 0 : 0x0001, 0);
+		ace_writew(width == 8 ? 0 : 0x0001, 0);
 
 		init_part(&systemace_dev);
 
@@ -128,6 +141,7 @@ block_dev_desc_t *systemace_get_dev(int dev)
 
 	return &systemace_dev;
 }
+#endif
 
 /*
  * This function is called (by dereferencing the block_read pointer in
@@ -135,7 +149,7 @@ block_dev_desc_t *systemace_get_dev(int dev)
  * number of blocks read. A zero return indicates an error.
  */
 static unsigned long systemace_read(int dev, unsigned long start,
-				    unsigned long blkcnt, void *buffer)
+					lbaint_t blkcnt, void *buffer)
 {
 	int retry;
 	unsigned blk_countdown;