X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fcfi_flash.c;h=5579a1efc155e3cb9d488af81d5262b2d2b19c95;hb=fb05f6da35ea1c15c553abe6f23f656bf18dc5db;hp=3d0f2045011f1009258629ae45a8bbac9bd8ffa5;hpb=55d150d95dbd4612f229e1f503c3a6aa8ed08a96;p=u-boot diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c index 3d0f204501..5579a1efc1 100644 --- a/drivers/cfi_flash.c +++ b/drivers/cfi_flash.c @@ -4,11 +4,12 @@ * * Copyright (C) 2003 Arabella Software Ltd. * Yuli Barcohen - * Modified to work with AMD flashes * * Copyright (C) 2004 * Ed Okerson - * Modified to work with little-endian systems. + * + * Copyright (C) 2006 + * Tolunay Orkun * * See file CREDITS for list of people who contributed to this * project. @@ -28,17 +29,6 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA * - * History - * 01/20/2004 - combined variants of original driver. - * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay) - * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud) - * 01/27/2004 - Little endian support Ed Okerson - * - * Tested Architectures - * Port Width Chip Width # of banks Flash Chip Board - * 32 16 1 28F128J3 seranoa/eagle - * 64 16 1 28F128J3 seranoa/falcon - * */ /* The DEBUG define must be before common to enable debugging */ @@ -46,8 +36,8 @@ #include #include +#include #include -#include #include #ifdef CFG_FLASH_CFI_DRIVER @@ -55,21 +45,18 @@ * This file implements a Common Flash Interface (CFI) driver for U-Boot. * The width of the port and the width of the chips are determined at initialization. * These widths are used to calculate the address for access CFI data structures. - * It has been tested on an Intel Strataflash implementation and AMD 29F016D. * * References * JEDEC Standard JESD68 - Common Flash Interface (CFI) * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet + * AMD CFI Specification, Release 2.0 December 1, 2001 + * AMD/Spansion Application Note: Migration from Single-byte to Three-byte + * Device IDs, Publication Number 25538 Revision A, November 8, 2001 * - * TODO - * - * Use Primary Extended Query table (PRI) and Alternate Algorithm Query - * Table (ALT) to determine if protection is available - * - * Add support for other command sets Use the PRI and ALT to determine command set - * Verify erase and program timeouts. + * define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between + * reading and writing ... (yes there is such a Hardware). */ #ifndef CFG_FLASH_BANKS_LIST @@ -105,16 +92,25 @@ #define AMD_CMD_ERASE_SECTOR 0x30 #define AMD_CMD_UNLOCK_START 0xAA #define AMD_CMD_UNLOCK_ACK 0x55 +#define AMD_CMD_WRITE_TO_BUFFER 0x25 +#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29 #define AMD_STATUS_TOGGLE 0x40 #define AMD_STATUS_ERROR 0x20 -#define AMD_ADDR_ERASE_START 0x555 -#define AMD_ADDR_START 0x555 -#define AMD_ADDR_ACK 0x2AA +#define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555) +#define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555) +#define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA) + +#define FLASH_OFFSET_MANUFACTURER_ID 0x00 +#define FLASH_OFFSET_DEVICE_ID 0x01 +#define FLASH_OFFSET_DEVICE_ID2 0x0E +#define FLASH_OFFSET_DEVICE_ID3 0x0F #define FLASH_OFFSET_CFI 0x55 +#define FLASH_OFFSET_CFI_ALT 0x555 #define FLASH_OFFSET_CFI_RESP 0x10 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 +#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */ #define FLASH_OFFSET_WTOUT 0x1F #define FLASH_OFFSET_WBTOUT 0x20 #define FLASH_OFFSET_ETOUT 0x21 @@ -132,25 +128,20 @@ #define FLASH_OFFSET_USER_PROTECTION 0x85 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 - -#define FLASH_MAN_CFI 0x01000000 - -#define CFI_CMDSET_NONE 0 -#define CFI_CMDSET_INTEL_EXTENDED 1 -#define CFI_CMDSET_AMD_STANDARD 2 -#define CFI_CMDSET_INTEL_STANDARD 3 -#define CFI_CMDSET_AMD_EXTENDED 4 -#define CFI_CMDSET_MITSU_STANDARD 256 -#define CFI_CMDSET_MITSU_EXTENDED 257 -#define CFI_CMDSET_SST 258 - +#define CFI_CMDSET_NONE 0 +#define CFI_CMDSET_INTEL_EXTENDED 1 +#define CFI_CMDSET_AMD_STANDARD 2 +#define CFI_CMDSET_INTEL_STANDARD 3 +#define CFI_CMDSET_AMD_EXTENDED 4 +#define CFI_CMDSET_MITSU_STANDARD 256 +#define CFI_CMDSET_MITSU_EXTENDED 257 +#define CFI_CMDSET_SST 258 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ # undef FLASH_CMD_RESET -# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ +# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ #endif - typedef union { unsigned char c; unsigned short w; @@ -165,11 +156,26 @@ typedef union { volatile unsigned long long *llp; } cfiptr_t; -#define NUM_ERASE_REGIONS 4 +#define NUM_ERASE_REGIONS 4 /* max. number of erase regions */ +static uint flash_offset_cfi[2]={FLASH_OFFSET_CFI,FLASH_OFFSET_CFI_ALT}; + +/* use CFG_MAX_FLASH_BANKS_DETECT if defined */ +#ifdef CFG_MAX_FLASH_BANKS_DETECT +static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST; +flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */ +#else static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST; +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */ +#endif + +/* + * Check if chip width is defined. If not, start detecting with 8bit. + */ +#ifndef CFG_FLASH_CFI_WIDTH +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT +#endif -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Functions @@ -184,12 +190,15 @@ static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect); static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); +static void flash_read_jedec_ids (flash_info_t * info); static int flash_detect_cfi (flash_info_t * info); -static ulong flash_get_size (ulong base, int banknum); static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword); static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, ulong tout, char *prompt); +ulong flash_get_size (ulong base, int banknum); +#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE) static flash_info_t *flash_get_info(ulong base); +#endif #ifdef CFG_FLASH_USE_BUFFER_WRITE static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len); #endif @@ -220,7 +229,7 @@ static void flash_printqry (flash_info_t * info, flash_sect_t sect) cfiptr_t cptr; int x, y; - for (x = 0; x < 0x40; x += 16 / info->portwidth) { + for (x = 0; x < 0x40; x += 16U / info->portwidth) { cptr.cp = flash_make_addr (info, sect, x + FLASH_OFFSET_CFI_RESP); @@ -250,7 +259,7 @@ inline uchar flash_read_uchar (flash_info_t * info, uint offset) uchar *cp; cp = flash_make_addr (info, 0, offset); -#if defined(__LITTLE_ENDIAN) +#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) return (cp[0]); #else return (cp[info->portwidth - 1]); @@ -277,7 +286,7 @@ ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset) debug ("addr[%x] = 0x%x\n", x, addr[x]); } #endif -#if defined(__LITTLE_ENDIAN) +#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) retval = ((addr[(info->portwidth)] << 8) | addr[0]); #else retval = ((addr[(2 * info->portwidth) - 1] << 8) | @@ -289,7 +298,7 @@ ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset) } /*----------------------------------------------------------------------- - * read a long word by picking the least significant byte of each maiximum + * read a long word by picking the least significant byte of each maximum * port size word. Swap for ppc format. */ ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset) @@ -309,7 +318,7 @@ ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset) debug ("addr[%x] = 0x%x\n", x, addr[x]); } #endif -#if defined(__LITTLE_ENDIAN) +#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) | (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8); #else @@ -321,6 +330,7 @@ ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset) return retval; } + /*----------------------------------------------------------------------- */ unsigned long flash_init (void) @@ -328,14 +338,62 @@ unsigned long flash_init (void) unsigned long size = 0; int i; +#ifdef CFG_FLASH_PROTECTION + char *s = getenv("unlock"); +#endif + /* Init: no FLASHes known */ for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; size += flash_info[i].size = flash_get_size (bank_base[i], i); if (flash_info[i].flash_id == FLASH_UNKNOWN) { +#ifndef CFG_FLASH_QUIET_TEST printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", - i, flash_info[i].size, flash_info[i].size << 20); + i+1, flash_info[i].size, flash_info[i].size << 20); +#endif /* CFG_FLASH_QUIET_TEST */ } +#ifdef CFG_FLASH_PROTECTION + else if ((s != NULL) && (strcmp(s, "yes") == 0)) { + /* + * Only the U-Boot image and it's environment is protected, + * all other sectors are unprotected (unlocked) if flash + * hardware protection is used (CFG_FLASH_PROTECTION) and + * the environment variable "unlock" is set to "yes". + */ + if (flash_info[i].legacy_unlock) { + int k; + + /* + * Disable legacy_unlock temporarily, since + * flash_real_protect would relock all other sectors + * again otherwise. + */ + flash_info[i].legacy_unlock = 0; + + /* + * Legacy unlocking (e.g. Intel J3) -> unlock only one + * sector. This will unlock all sectors. + */ + flash_real_protect (&flash_info[i], 0, 0); + + flash_info[i].legacy_unlock = 1; + + /* + * Manually mark other sectors as unlocked (unprotected) + */ + for (k = 1; k < flash_info[i].sector_count; k++) + flash_info[i].protect[k] = 0; + } else { + /* + * No legancy unlocking -> unlock all sectors + */ + flash_protect (FLAG_PROTECT_CLEAR, + flash_info[i].start[0], + flash_info[i].start[0] + flash_info[i].size - 1, + &flash_info[i]); + } + } +#endif /* CFG_FLASH_PROTECTION */ } /* Monitor protection ON by default */ @@ -366,10 +424,11 @@ unsigned long flash_init (void) /*----------------------------------------------------------------------- */ +#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE) static flash_info_t *flash_get_info(ulong base) { int i; - flash_info_t * info; + flash_info_t * info = 0; for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { info = & flash_info[i]; @@ -380,6 +439,7 @@ static flash_info_t *flash_get_info(ulong base) return i == CFG_MAX_FLASH_BANKS ? 0 : info; } +#endif /*----------------------------------------------------------------------- */ @@ -460,14 +520,42 @@ void flash_print_info (flash_info_t * info) (info->portwidth << 3), (info->chipwidth << 3)); printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); - printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n", + printf (" "); + switch (info->vendor) { + case CFI_CMDSET_INTEL_STANDARD: + printf ("Intel Standard"); + break; + case CFI_CMDSET_INTEL_EXTENDED: + printf ("Intel Extended"); + break; + case CFI_CMDSET_AMD_STANDARD: + printf ("AMD Standard"); + break; + case CFI_CMDSET_AMD_EXTENDED: + printf ("AMD Extended"); + break; + default: + printf ("Unknown (%d)", info->vendor); + break; + } + printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X", + info->manufacturer_id, info->device_id); + if (info->device_id == 0x7E) { + printf("%04X", info->device_id2); + } + printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n", info->erase_blk_tout, - info->write_tout, + info->write_tout); + if (info->buffer_size > 1) { + printf (" Buffer write timeout: %ld ms, buffer size: %d bytes\n", info->buffer_write_tout, info->buffer_size); + } - puts (" Sector Start Addresses:"); + puts ("\n Sector Start Addresses:"); for (i = 0; i < info->sector_count; ++i) { + if ((i % 5) == 0) + printf ("\n"); #ifdef CFG_FLASH_EMPTY_INFO int k; int size; @@ -491,18 +579,15 @@ void flash_print_info (flash_info_t * info) } } - if ((i % 5) == 0) - printf ("\n"); /* print empty and read-only info */ - printf (" %08lX%s%s", + printf (" %08lX %c %s ", info->start[i], - erased ? " E" : " ", - info->protect[i] ? "RO " : " "); -#else - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO) " : " "); + erased ? 'E' : ' ', + info->protect[i] ? "RO" : " "); +#else /* ! CFG_FLASH_EMPTY_INFO */ + printf (" %08lX %s ", + info->start[i], + info->protect[i] ? "RO" : " "); #endif } putc ('\n'); @@ -554,7 +639,22 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) buffered_size = (info->portwidth / info->chipwidth); buffered_size *= info->buffer_size; while (cnt >= info->portwidth) { - i = buffered_size > cnt ? cnt : buffered_size; + /* prohibit buffer write when buffer_size is 1 */ + if (info->buffer_size == 1) { + cword.l = 0; + for (i = 0; i < info->portwidth; i++) + flash_add_byte (info, &cword, *src++); + if ((rc = flash_write_cfiword (info, wp, cword)) != 0) + return rc; + wp += info->portwidth; + cnt -= info->portwidth; + continue; + } + + /* write buffer until next buffered_size aligned boundary */ + i = buffered_size - (wp % buffered_size); + if (i > cnt) + i = cnt; if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) return rc; i -= i & (info->portwidth - 1); @@ -613,8 +713,12 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) prot ? "protect" : "unprotect")) == 0) { info->protect[sector] = prot; - /* Intel's unprotect unprotects all locking */ - if (prot == 0) { + + /* + * On some of Intel's flash chips (marked via legacy_unlock) + * unprotect unprotects all locking. + */ + if ((prot == 0) && (info->legacy_unlock)) { flash_sect_t i; for (i = 0; i < info->sector_count; i++) { @@ -639,7 +743,7 @@ void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION); flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); memcpy (dst, src + offset, len); - flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); + flash_write_cmd (info, 0, 0, info->cmd_reset); } /* @@ -653,7 +757,7 @@ void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION); flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); memcpy (buffer, src + offset, len); - flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); + flash_write_cmd (info, 0, 0, info->cmd_reset); } #endif /* CFG_FLASH_PROTECTION */ @@ -691,16 +795,21 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, { ulong start; +#if CFG_HZ != 1000 + tout *= CFG_HZ/1000; +#endif + /* Wait for command completion */ start = get_timer (0); while (flash_is_busy (info, sector)) { - if (get_timer (start) > info->erase_blk_tout * CFG_HZ) { + if (get_timer (start) > tout) { printf ("Flash %s timeout at address %lx data %lx\n", prompt, info->start[sector], flash_read_long (info, sector, 0)); flash_write_cmd (info, sector, 0, info->cmd_reset); return ERR_TIMOUT; } + udelay (1); /* also triggers watchdog */ } return ERR_OK; } @@ -718,7 +827,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, switch (info->vendor) { case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: - if ((retcode != ERR_OK) + if ((retcode == ERR_OK) && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { retcode = ERR_INVAL; printf ("Flash %s error at address %lx\n", prompt, @@ -738,7 +847,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) puts ("Vpp Low Error.\n"); } - flash_write_cmd (info, sector, 0, FLASH_CMD_RESET); + flash_write_cmd (info, sector, 0, info->cmd_reset); break; default: break; @@ -750,7 +859,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, */ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) { -#if defined(__LITTLE_ENDIAN) +#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) unsigned short w; unsigned int l; unsigned long long ll; @@ -761,7 +870,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) cword->c = c; break; case FLASH_CFI_16BIT: -#if defined(__LITTLE_ENDIAN) +#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) w = c; w <<= 8; cword->w = (cword->w >> 8) | w; @@ -770,7 +879,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) #endif break; case FLASH_CFI_32BIT: -#if defined(__LITTLE_ENDIAN) +#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) l = c; l <<= 24; cword->l = (cword->l >> 8) | l; @@ -779,7 +888,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) #endif break; case FLASH_CFI_64BIT: -#if defined(__LITTLE_ENDIAN) +#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) ll = c; ll <<= 56; cword->ll = (cword->ll >> 8) | ll; @@ -797,32 +906,14 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf) { int i; - -#if defined(__LITTLE_ENDIAN) - ushort stmpw; - uint stmpi; -#endif uchar *cp = (uchar *) cmdbuf; - for (i = 0; i < info->portwidth; i++) - *cp++ = ((i + 1) & (info->chipwidth - 1)) ? '\0' : cmd; -#if defined(__LITTLE_ENDIAN) - switch (info->portwidth) { - case FLASH_CFI_8BIT: - break; - case FLASH_CFI_16BIT: - stmpw = *(ushort *) cmdbuf; - *(ushort *) cmdbuf = __swab16 (stmpw); - break; - case FLASH_CFI_32BIT: - stmpi = *(uint *) cmdbuf; - *(uint *) cmdbuf = __swab32 (stmpi); - break; - default: - puts ("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n"); - break; - } +#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) + for (i = info->portwidth; i > 0; i--) +#else + for (i = 1; i <= info->portwidth; i++) #endif + *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd; } /* @@ -869,6 +960,9 @@ static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset *addr.llp = cword.ll; break; } + + /* Ensure all the instructions are fully finished */ + sync(); } static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect) @@ -983,6 +1077,55 @@ static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uc return retval; } +/*----------------------------------------------------------------------- + * read jedec ids from device and set corresponding fields in info struct + * + * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct + * +*/ +static void flash_read_jedec_ids (flash_info_t * info) +{ + info->manufacturer_id = 0; + info->device_id = 0; + info->device_id2 = 0; + + switch (info->vendor) { + case CFI_CMDSET_INTEL_STANDARD: + case CFI_CMDSET_INTEL_EXTENDED: + flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); + flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID); + udelay(1000); /* some flash are slow to respond */ + info->manufacturer_id = flash_read_uchar (info, + FLASH_OFFSET_MANUFACTURER_ID); + info->device_id = flash_read_uchar (info, + FLASH_OFFSET_DEVICE_ID); + flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); + break; + case CFI_CMDSET_AMD_STANDARD: + case CFI_CMDSET_AMD_EXTENDED: + flash_write_cmd(info, 0, 0, AMD_CMD_RESET); + flash_unlock_seq(info, 0); + flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID); + udelay(1000); /* some flash are slow to respond */ + info->manufacturer_id = flash_read_uchar (info, + FLASH_OFFSET_MANUFACTURER_ID); + info->device_id = flash_read_uchar (info, + FLASH_OFFSET_DEVICE_ID); + if (info->device_id == 0x7E) { + /* AMD 3-byte (expanded) device ids */ + info->device_id2 = flash_read_uchar (info, + FLASH_OFFSET_DEVICE_ID2); + info->device_id2 <<= 8; + info->device_id2 |= flash_read_uchar (info, + FLASH_OFFSET_DEVICE_ID3); + } + flash_write_cmd(info, 0, 0, AMD_CMD_RESET); + break; + default: + break; + } +} + /*----------------------------------------------------------------------- * detect if flash is compatible with the Common Flash Interface (CFI) * http://www.jedec.org/download/search/jesd68.pdf @@ -990,27 +1133,31 @@ static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uc */ static int flash_detect_cfi (flash_info_t * info) { + int cfi_offset; debug ("flash detect cfi\n"); - for (info->portwidth = FLASH_CFI_8BIT; + for (info->portwidth = CFG_FLASH_CFI_WIDTH; info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { for (info->chipwidth = FLASH_CFI_BY8; info->chipwidth <= info->portwidth; info->chipwidth <<= 1) { - flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); - flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI); - if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') - && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') - && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { - info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE); - debug ("device interface is %d\n", - info->interface); - debug ("found port %d chip %d ", - info->portwidth, info->chipwidth); - debug ("port %d bits chip %d bits\n", - info->portwidth << CFI_FLASH_SHIFT_WIDTH, - info->chipwidth << CFI_FLASH_SHIFT_WIDTH); - return 1; + flash_write_cmd (info, 0, 0, info->cmd_reset); + for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi)/sizeof(uint); cfi_offset++) { + flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI); + if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') + && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') + && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) { + info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE); + info->cfi_offset=flash_offset_cfi[cfi_offset]; + debug ("device interface is %d\n", + info->interface); + debug ("found port %d chip %d ", + info->portwidth, info->chipwidth); + debug ("port %d bits chip %d bits\n", + info->portwidth << CFI_FLASH_SHIFT_WIDTH, + info->chipwidth << CFI_FLASH_SHIFT_WIDTH); + return 1; + } } } } @@ -1022,7 +1169,7 @@ static int flash_detect_cfi (flash_info_t * info) * The following code cannot be run from FLASH! * */ -static ulong flash_get_size (ulong base, int banknum) +ulong flash_get_size (ulong base, int banknum) { flash_info_t *info = &flash_info[banknum]; int i, j; @@ -1033,11 +1180,31 @@ static ulong flash_get_size (ulong base, int banknum) uchar num_erase_regions; int erase_region_size; int erase_region_count; + int geometry_reversed = 0; + + info->ext_addr = 0; + info->cfi_version = 0; +#ifdef CFG_FLASH_PROTECTION + info->legacy_unlock = 0; +#endif info->start[0] = base; if (flash_detect_cfi (info)) { - info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR); + info->vendor = flash_read_ushort (info, 0, + FLASH_OFFSET_PRIMARY_VENDOR); + flash_read_jedec_ids (info); + flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI); + num_erase_regions = flash_read_uchar (info, + FLASH_OFFSET_NUM_ERASE_REGIONS); + info->ext_addr = flash_read_ushort (info, 0, + FLASH_OFFSET_EXT_QUERY_T_P_ADDR); + if (info->ext_addr) { + info->cfi_version = (ushort) flash_read_uchar (info, + info->ext_addr + 3) << 8; + info->cfi_version |= (ushort) flash_read_uchar (info, + info->ext_addr + 4); + } #ifdef DEBUG flash_printqry (info, 0); #endif @@ -1046,21 +1213,48 @@ static ulong flash_get_size (ulong base, int banknum) case CFI_CMDSET_INTEL_EXTENDED: default: info->cmd_reset = FLASH_CMD_RESET; +#ifdef CFG_FLASH_PROTECTION + /* read legacy lock/unlock bit from intel flash */ + if (info->ext_addr) { + info->legacy_unlock = flash_read_uchar (info, + info->ext_addr + 5) & 0x08; + } +#endif break; case CFI_CMDSET_AMD_STANDARD: case CFI_CMDSET_AMD_EXTENDED: info->cmd_reset = AMD_CMD_RESET; + /* check if flash geometry needs reversal */ + if (num_erase_regions <= 1) + break; + /* reverse geometry if top boot part */ + if (info->cfi_version < 0x3131) { + /* CFI < 1.1, try to guess from device id */ + if ((info->device_id & 0x80) != 0) { + geometry_reversed = 1; + } + break; + } + /* CFI >= 1.1, deduct from top/bottom flag */ + /* note: ext_addr is valid since cfi_version > 0 */ + if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) { + geometry_reversed = 1; + } break; } debug ("manufacturer is %d\n", info->vendor); + debug ("manufacturer id is 0x%x\n", info->manufacturer_id); + debug ("device id is 0x%x\n", info->device_id); + debug ("device id2 is 0x%x\n", info->device_id2); + debug ("cfi version is 0x%04x\n", info->cfi_version); + size_ratio = info->portwidth / info->chipwidth; /* if the chip is x8/x16 reduce the ratio by half */ if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { size_ratio >>= 1; } - num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS); debug ("size_ratio %d port %d bits chip %d bits\n", size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); @@ -1073,7 +1267,12 @@ static ulong flash_get_size (ulong base, int banknum) num_erase_regions, NUM_ERASE_REGIONS); break; } - tmp = flash_read_long (info, 0, + if (geometry_reversed) + tmp = flash_read_long (info, 0, + FLASH_OFFSET_ERASE_REGIONS + + (num_erase_regions - 1 - i) * 4); + else + tmp = flash_read_long (info, 0, FLASH_OFFSET_ERASE_REGIONS + i * 4); erase_region_size = @@ -1111,27 +1310,42 @@ static ulong flash_get_size (ulong base, int banknum) info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE)); tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT); info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT))); - tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT); - info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT))); - tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT); - info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000; + tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) * + (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)); + info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ + tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) * + (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT)); + info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ info->flash_id = FLASH_MAN_CFI; if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */ } } - flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); + flash_write_cmd (info, 0, 0, info->cmd_reset); return (info->size); } +/* loop through the sectors from the highest address + * when the passed address is greater or equal to the sector address + * we have a match + */ +static flash_sect_t find_sector (flash_info_t * info, ulong addr) +{ + flash_sect_t sector; + + for (sector = info->sector_count - 1; sector >= 0; sector--) { + if (addr >= info->start[sector]) + break; + } + return sector; +} /*----------------------------------------------------------------------- */ static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword) { - cfiptr_t ctladdr; cfiptr_t cptr; int flag; @@ -1139,7 +1353,6 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, ctladdr.cp = flash_make_addr (info, 0, 0); cptr.cp = (uchar *) dest; - /* Check if Flash is (sufficiently) erased */ switch (info->portwidth) { case FLASH_CFI_8BIT: @@ -1195,26 +1408,12 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, if (flag) enable_interrupts (); - return flash_full_status_check (info, 0, info->write_tout, "write"); + return flash_full_status_check (info, find_sector (info, dest), + info->write_tout, "write"); } #ifdef CFG_FLASH_USE_BUFFER_WRITE -/* loop through the sectors from the highest address - * when the passed address is greater or equal to the sector address - * we have a match - */ -static flash_sect_t find_sector (flash_info_t * info, ulong addr) -{ - flash_sect_t sector; - - for (sector = info->sector_count - 1; sector >= 0; sector--) { - if (addr >= info->start[sector]) - break; - } - return sector; -} - static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len) { @@ -1223,66 +1422,107 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int retcode; volatile cfiptr_t src; volatile cfiptr_t dst; - /* buffered writes in the AMD chip set is not supported yet */ - if((info->vendor == CFI_CMDSET_AMD_STANDARD) || - (info->vendor == CFI_CMDSET_AMD_EXTENDED)) - return ERR_INVAL; - src.cp = cp; - dst.cp = (uchar *) dest; - sector = find_sector (info, dest); - flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); - flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER); - if ((retcode = - flash_status_check (info, sector, info->buffer_write_tout, - "write to buffer")) == ERR_OK) { - /* reduce the number of loops by the width of the port */ + switch (info->vendor) { + case CFI_CMDSET_INTEL_STANDARD: + case CFI_CMDSET_INTEL_EXTENDED: + src.cp = cp; + dst.cp = (uchar *) dest; + sector = find_sector (info, dest); + flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); + flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER); + if ((retcode = flash_status_check (info, sector, info->buffer_write_tout, + "write to buffer")) == ERR_OK) { + /* reduce the number of loops by the width of the port */ + switch (info->portwidth) { + case FLASH_CFI_8BIT: + cnt = len; + break; + case FLASH_CFI_16BIT: + cnt = len >> 1; + break; + case FLASH_CFI_32BIT: + cnt = len >> 2; + break; + case FLASH_CFI_64BIT: + cnt = len >> 3; + break; + default: + return ERR_INVAL; + break; + } + flash_write_cmd (info, sector, 0, (uchar) cnt - 1); + while (cnt-- > 0) { + switch (info->portwidth) { + case FLASH_CFI_8BIT: + *dst.cp++ = *src.cp++; + break; + case FLASH_CFI_16BIT: + *dst.wp++ = *src.wp++; + break; + case FLASH_CFI_32BIT: + *dst.lp++ = *src.lp++; + break; + case FLASH_CFI_64BIT: + *dst.llp++ = *src.llp++; + break; + default: + return ERR_INVAL; + break; + } + } + flash_write_cmd (info, sector, 0, + FLASH_CMD_WRITE_BUFFER_CONFIRM); + retcode = flash_full_status_check (info, sector, + info->buffer_write_tout, + "buffer write"); + } + return retcode; + + case CFI_CMDSET_AMD_STANDARD: + case CFI_CMDSET_AMD_EXTENDED: + src.cp = cp; + dst.cp = (uchar *) dest; + sector = find_sector (info, dest); + + flash_unlock_seq(info,0); + flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER); + switch (info->portwidth) { case FLASH_CFI_8BIT: cnt = len; + flash_write_cmd (info, sector, 0, (uchar) cnt - 1); + while (cnt-- > 0) *dst.cp++ = *src.cp++; break; case FLASH_CFI_16BIT: cnt = len >> 1; + flash_write_cmd (info, sector, 0, (uchar) cnt - 1); + while (cnt-- > 0) *dst.wp++ = *src.wp++; break; case FLASH_CFI_32BIT: cnt = len >> 2; + flash_write_cmd (info, sector, 0, (uchar) cnt - 1); + while (cnt-- > 0) *dst.lp++ = *src.lp++; break; case FLASH_CFI_64BIT: cnt = len >> 3; + flash_write_cmd (info, sector, 0, (uchar) cnt - 1); + while (cnt-- > 0) *dst.llp++ = *src.llp++; break; default: return ERR_INVAL; - break; } - flash_write_cmd (info, sector, 0, (uchar) cnt - 1); - while (cnt-- > 0) { - switch (info->portwidth) { - case FLASH_CFI_8BIT: - *dst.cp++ = *src.cp++; - break; - case FLASH_CFI_16BIT: - *dst.wp++ = *src.wp++; - break; - case FLASH_CFI_32BIT: - *dst.lp++ = *src.lp++; - break; - case FLASH_CFI_64BIT: - *dst.llp++ = *src.llp++; - break; - default: - return ERR_INVAL; - break; - } - } - flash_write_cmd (info, sector, 0, - FLASH_CMD_WRITE_BUFFER_CONFIRM); - retcode = - flash_full_status_check (info, sector, - info->buffer_write_tout, - "buffer write"); + + flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); + retcode = flash_full_status_check (info, sector, info->buffer_write_tout, + "buffer write"); + return retcode; + + default: + debug ("Unknown Command Set\n"); + return ERR_INVAL; } - flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); - return retcode; } #endif /* CFG_FLASH_USE_BUFFER_WRITE */ + #endif /* CFG_FLASH_CFI */