X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fcfi_flash.c;h=fd0a186828d4be171f6cfeb11e95133de214245d;hb=ad09083c3736ea72bceee92721933513d3137b66;hp=101eb7491364f93cff062eb18985a5ab9a5c65e4;hpb=a1191902cab72b9f7127365fac39a1e1d5c9abda;p=u-boot diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c index 101eb74913..fd0a186828 100644 --- a/drivers/cfi_flash.c +++ b/drivers/cfi_flash.c @@ -47,7 +47,7 @@ #include #include #include -#include +#include #ifdef CFG_FLASH_CFI_DRIVER /* @@ -104,16 +104,20 @@ #define AMD_CMD_ERASE_SECTOR 0x30 #define AMD_CMD_UNLOCK_START 0xAA #define AMD_CMD_UNLOCK_ACK 0x55 +#define AMD_CMD_WRITE_TO_BUFFER 0x25 +#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29 #define AMD_STATUS_TOGGLE 0x40 #define AMD_STATUS_ERROR 0x20 -#define AMD_ADDR_ERASE_START 0x555 -#define AMD_ADDR_START 0x555 -#define AMD_ADDR_ACK 0x2AA + +#define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555) +#define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555) +#define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA) #define FLASH_OFFSET_CFI 0x55 #define FLASH_OFFSET_CFI_RESP 0x10 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13 +#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */ #define FLASH_OFFSET_WTOUT 0x1F #define FLASH_OFFSET_WBTOUT 0x20 #define FLASH_OFFSET_ETOUT 0x21 @@ -166,9 +170,22 @@ typedef union { #define NUM_ERASE_REGIONS 4 +/* use CFG_MAX_FLASH_BANKS_DETECT if defined */ +#ifdef CFG_MAX_FLASH_BANKS_DETECT +static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST; +flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */ +#else static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST; +flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */ +#endif + +/* + * Check if chip width is defined. If not, start detecting with 8bit. + */ +#ifndef CFG_FLASH_CFI_WIDTH +#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT +#endif -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Functions @@ -184,10 +201,13 @@ static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, u static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd); static int flash_detect_cfi (flash_info_t * info); -static ulong flash_get_size (ulong base, int banknum); static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword); static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, ulong tout, char *prompt); +ulong flash_get_size (ulong base, int banknum); +#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE) +static flash_info_t *flash_get_info(ulong base); +#endif #ifdef CFG_FLASH_USE_BUFFER_WRITE static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len); #endif @@ -218,7 +238,7 @@ static void flash_printqry (flash_info_t * info, flash_sect_t sect) cfiptr_t cptr; int x, y; - for (x = 0; x < 0x40; x += 16 / info->portwidth) { + for (x = 0; x < 0x40; x += 16U / info->portwidth) { cptr.cp = flash_make_addr (info, sect, x + FLASH_OFFSET_CFI_RESP); @@ -319,6 +339,7 @@ ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset) return retval; } + /*----------------------------------------------------------------------- */ unsigned long flash_init (void) @@ -326,22 +347,70 @@ unsigned long flash_init (void) unsigned long size = 0; int i; +#ifdef CFG_FLASH_PROTECTION + char *s = getenv("unlock"); +#endif + /* Init: no FLASHes known */ for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; size += flash_info[i].size = flash_get_size (bank_base[i], i); if (flash_info[i].flash_id == FLASH_UNKNOWN) { +#ifndef CFG_FLASH_QUIET_TEST printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", i, flash_info[i].size, flash_info[i].size << 20); +#endif /* CFG_FLASH_QUIET_TEST */ } +#ifdef CFG_FLASH_PROTECTION + else if ((s != NULL) && (strcmp(s, "yes") == 0)) { + /* + * Only the U-Boot image and it's environment is protected, + * all other sectors are unprotected (unlocked) if flash + * hardware protection is used (CFG_FLASH_PROTECTION) and + * the environment variable "unlock" is set to "yes". + */ + if (flash_info[i].legacy_unlock) { + int k; + + /* + * Disable legacy_unlock temporarily, since + * flash_real_protect would relock all other sectors + * again otherwise. + */ + flash_info[i].legacy_unlock = 0; + + /* + * Legacy unlocking (e.g. Intel J3) -> unlock only one + * sector. This will unlock all sectors. + */ + flash_real_protect (&flash_info[i], 0, 0); + + flash_info[i].legacy_unlock = 1; + + /* + * Manually mark other sectors as unlocked (unprotected) + */ + for (k = 1; k < flash_info[i].sector_count; k++) + flash_info[i].protect[k] = 0; + } else { + /* + * No legancy unlocking -> unlock all sectors + */ + flash_protect (FLAG_PROTECT_CLEAR, + flash_info[i].start[0], + flash_info[i].start[0] + flash_info[i].size - 1, + &flash_info[i]); + } + } +#endif /* CFG_FLASH_PROTECTION */ } /* Monitor protection ON by default */ #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) flash_protect (FLAG_PROTECT_SET, CFG_MONITOR_BASE, - CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1, - &flash_info[0]); + CFG_MONITOR_BASE + monitor_flash_len - 1, + flash_get_info(CFG_MONITOR_BASE)); #endif /* Environment protection ON by default */ @@ -349,7 +418,7 @@ unsigned long flash_init (void) flash_protect (FLAG_PROTECT_SET, CFG_ENV_ADDR, CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, - &flash_info[0]); + flash_get_info(CFG_ENV_ADDR)); #endif /* Redundant environment protection ON by default */ @@ -357,11 +426,30 @@ unsigned long flash_init (void) flash_protect (FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND, CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1, - &flash_info[0]); + flash_get_info(CFG_ENV_ADDR_REDUND)); #endif return (size); } +/*----------------------------------------------------------------------- + */ +#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE) +static flash_info_t *flash_get_info(ulong base) +{ + int i; + flash_info_t * info = 0; + + for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { + info = & flash_info[i]; + if (info->size && info->start[0] <= base && + base <= info->start[0] + info->size - 1) + break; + } + + return i == CFG_MAX_FLASH_BANKS ? 0 : info; +} +#endif + /*----------------------------------------------------------------------- */ int flash_erase (flash_info_t * info, int s_first, int s_last) @@ -479,11 +567,11 @@ void flash_print_info (flash_info_t * info) info->start[i], erased ? " E" : " ", info->protect[i] ? "RO " : " "); -#else +#else /* ! CFG_FLASH_EMPTY_INFO */ if ((i % 5) == 0) printf ("\n "); printf (" %08lX%s", - info->start[i], info->protect[i] ? " (RO) " : " "); + info->start[i], info->protect[i] ? " (RO)" : " "); #endif } putc ('\n'); @@ -535,10 +623,25 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) buffered_size = (info->portwidth / info->chipwidth); buffered_size *= info->buffer_size; while (cnt >= info->portwidth) { - i = buffered_size > cnt ? cnt : buffered_size; + /* prohibit buffer write when buffer_size is 1 */ + if (info->buffer_size == 1) { + cword.l = 0; + for (i = 0; i < info->portwidth; i++) + flash_add_byte (info, &cword, *src++); + if ((rc = flash_write_cfiword (info, wp, cword)) != 0) + return rc; + wp += info->portwidth; + cnt -= info->portwidth; + continue; + } + + /* write buffer until next buffered_size aligned boundary */ + i = buffered_size - (wp % buffered_size); + if (i > cnt) + i = cnt; if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK) return rc; - i -= (i % info->portwidth); + i -= i & (info->portwidth - 1); wp += i; src += i; cnt -= i; @@ -594,8 +697,12 @@ int flash_real_protect (flash_info_t * info, long sector, int prot) prot ? "protect" : "unprotect")) == 0) { info->protect[sector] = prot; - /* Intel's unprotect unprotects all locking */ - if (prot == 0) { + + /* + * On some of Intel's flash chips (marked via legacy_unlock) + * unprotect unprotects all locking. + */ + if ((prot == 0) && (info->legacy_unlock)) { flash_sect_t i; for (i = 0; i < info->sector_count; i++) { @@ -620,7 +727,7 @@ void flash_read_user_serial (flash_info_t * info, void *buffer, int offset, src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION); flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); memcpy (dst, src + offset, len); - flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); + flash_write_cmd (info, 0, 0, info->cmd_reset); } /* @@ -634,7 +741,7 @@ void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION); flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID); memcpy (buffer, src + offset, len); - flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); + flash_write_cmd (info, 0, 0, info->cmd_reset); } #endif /* CFG_FLASH_PROTECTION */ @@ -672,16 +779,21 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, { ulong start; +#if CFG_HZ != 1000 + tout *= CFG_HZ/1000; +#endif + /* Wait for command completion */ start = get_timer (0); while (flash_is_busy (info, sector)) { - if (get_timer (start) > info->erase_blk_tout * CFG_HZ) { + if (get_timer (start) > tout) { printf ("Flash %s timeout at address %lx data %lx\n", prompt, info->start[sector], flash_read_long (info, sector, 0)); flash_write_cmd (info, sector, 0, info->cmd_reset); return ERR_TIMOUT; } + udelay (1); /* also triggers watchdog */ } return ERR_OK; } @@ -699,7 +811,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, switch (info->vendor) { case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: - if ((retcode != ERR_OK) + if ((retcode == ERR_OK) && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { retcode = ERR_INVAL; printf ("Flash %s error at address %lx\n", prompt, @@ -719,7 +831,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS)) puts ("Vpp Low Error.\n"); } - flash_write_cmd (info, sector, 0, FLASH_CMD_RESET); + flash_write_cmd (info, sector, 0, info->cmd_reset); break; default: break; @@ -778,32 +890,14 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf) { int i; - -#if defined(__LITTLE_ENDIAN) - ushort stmpw; - uint stmpi; -#endif uchar *cp = (uchar *) cmdbuf; - for (i = 0; i < info->portwidth; i++) - *cp++ = ((i + 1) % info->chipwidth) ? '\0' : cmd; #if defined(__LITTLE_ENDIAN) - switch (info->portwidth) { - case FLASH_CFI_8BIT: - break; - case FLASH_CFI_16BIT: - stmpw = *(ushort *) cmdbuf; - *(ushort *) cmdbuf = __swab16 (stmpw); - break; - case FLASH_CFI_32BIT: - stmpi = *(uint *) cmdbuf; - *(uint *) cmdbuf = __swab32 (stmpi); - break; - default: - puts ("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n"); - break; - } + for (i = info->portwidth; i > 0; i--) +#else + for (i = 1; i <= info->portwidth; i++) #endif + *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd; } /* @@ -822,18 +916,27 @@ static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd, cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); *addr.cp = cword.c; +#ifdef CONFIG_BLACKFIN + asm("ssync;"); +#endif break; case FLASH_CFI_16BIT: debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp, cmd, cword.w, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); *addr.wp = cword.w; +#ifdef CONFIG_BLACKFIN + asm("ssync;"); +#endif break; case FLASH_CFI_32BIT: debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp, cmd, cword.l, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); *addr.lp = cword.l; +#ifdef CONFIG_BLACKFIN + asm("ssync;"); +#endif break; case FLASH_CFI_64BIT: #ifdef DEBUG @@ -848,6 +951,9 @@ static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset } #endif *addr.llp = cword.ll; +#ifdef CONFIG_BLACKFIN + asm("ssync;"); +#endif break; } } @@ -973,12 +1079,12 @@ static int flash_detect_cfi (flash_info_t * info) { debug ("flash detect cfi\n"); - for (info->portwidth = FLASH_CFI_8BIT; + for (info->portwidth = CFG_FLASH_CFI_WIDTH; info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { for (info->chipwidth = FLASH_CFI_BY8; info->chipwidth <= info->portwidth; info->chipwidth <<= 1) { - flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); + flash_write_cmd (info, 0, 0, info->cmd_reset); flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI); if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q') && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') @@ -1003,7 +1109,7 @@ static int flash_detect_cfi (flash_info_t * info) * The following code cannot be run from FLASH! * */ -static ulong flash_get_size (ulong base, int banknum) +ulong flash_get_size (ulong base, int banknum) { flash_info_t *info = &flash_info[banknum]; int i, j; @@ -1014,6 +1120,10 @@ static ulong flash_get_size (ulong base, int banknum) uchar num_erase_regions; int erase_region_size; int erase_region_count; +#ifdef CFG_FLASH_PROTECTION + int ext_addr; + info->legacy_unlock = 0; +#endif info->start[0] = base; @@ -1027,6 +1137,13 @@ static ulong flash_get_size (ulong base, int banknum) case CFI_CMDSET_INTEL_EXTENDED: default: info->cmd_reset = FLASH_CMD_RESET; +#ifdef CFG_FLASH_PROTECTION + /* read legacy lock/unlock bit from intel flash */ + ext_addr = flash_read_ushort (info, 0, + FLASH_OFFSET_EXT_QUERY_T_P_ADDR); + info->legacy_unlock = + flash_read_uchar (info, ext_addr + 5) & 0x08; +#endif break; case CFI_CMDSET_AMD_STANDARD: case CFI_CMDSET_AMD_EXTENDED: @@ -1092,27 +1209,42 @@ static ulong flash_get_size (ulong base, int banknum) info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE)); tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT); info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT))); - tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT); - info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT))); - tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT); - info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000; + tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) * + (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)); + info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ + tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) * + (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT)); + info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */ info->flash_id = FLASH_MAN_CFI; if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) { info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */ } } - flash_write_cmd (info, 0, 0, FLASH_CMD_RESET); + flash_write_cmd (info, 0, 0, info->cmd_reset); return (info->size); } +/* loop through the sectors from the highest address + * when the passed address is greater or equal to the sector address + * we have a match + */ +static flash_sect_t find_sector (flash_info_t * info, ulong addr) +{ + flash_sect_t sector; + + for (sector = info->sector_count - 1; sector >= 0; sector--) { + if (addr >= info->start[sector]) + break; + } + return sector; +} /*----------------------------------------------------------------------- */ static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword) { - cfiptr_t ctladdr; cfiptr_t cptr; int flag; @@ -1176,26 +1308,12 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, if (flag) enable_interrupts (); - return flash_full_status_check (info, 0, info->write_tout, "write"); + return flash_full_status_check (info, find_sector (info, dest), + info->write_tout, "write"); } #ifdef CFG_FLASH_USE_BUFFER_WRITE -/* loop through the sectors from the highest address - * when the passed address is greater or equal to the sector address - * we have a match - */ -static flash_sect_t find_sector (flash_info_t * info, ulong addr) -{ - flash_sect_t sector; - - for (sector = info->sector_count - 1; sector >= 0; sector--) { - if (addr >= info->start[sector]) - break; - } - return sector; -} - static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len) { @@ -1204,66 +1322,106 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int retcode; volatile cfiptr_t src; volatile cfiptr_t dst; - /* buffered writes in the AMD chip set is not supported yet */ - if((info->vendor == CFI_CMDSET_AMD_STANDARD) || - (info->vendor == CFI_CMDSET_AMD_EXTENDED)) - return ERR_INVAL; - src.cp = cp; - dst.cp = (uchar *) dest; - sector = find_sector (info, dest); - flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); - flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER); - if ((retcode = - flash_status_check (info, sector, info->buffer_write_tout, - "write to buffer")) == ERR_OK) { - /* reduce the number of loops by the width of the port */ + switch (info->vendor) { + case CFI_CMDSET_INTEL_STANDARD: + case CFI_CMDSET_INTEL_EXTENDED: + src.cp = cp; + dst.cp = (uchar *) dest; + sector = find_sector (info, dest); + flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); + flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER); + if ((retcode = flash_status_check (info, sector, info->buffer_write_tout, + "write to buffer")) == ERR_OK) { + /* reduce the number of loops by the width of the port */ + switch (info->portwidth) { + case FLASH_CFI_8BIT: + cnt = len; + break; + case FLASH_CFI_16BIT: + cnt = len >> 1; + break; + case FLASH_CFI_32BIT: + cnt = len >> 2; + break; + case FLASH_CFI_64BIT: + cnt = len >> 3; + break; + default: + return ERR_INVAL; + break; + } + flash_write_cmd (info, sector, 0, (uchar) cnt - 1); + while (cnt-- > 0) { + switch (info->portwidth) { + case FLASH_CFI_8BIT: + *dst.cp++ = *src.cp++; + break; + case FLASH_CFI_16BIT: + *dst.wp++ = *src.wp++; + break; + case FLASH_CFI_32BIT: + *dst.lp++ = *src.lp++; + break; + case FLASH_CFI_64BIT: + *dst.llp++ = *src.llp++; + break; + default: + return ERR_INVAL; + break; + } + } + flash_write_cmd (info, sector, 0, + FLASH_CMD_WRITE_BUFFER_CONFIRM); + retcode = flash_full_status_check (info, sector, + info->buffer_write_tout, + "buffer write"); + } + return retcode; + + case CFI_CMDSET_AMD_STANDARD: + case CFI_CMDSET_AMD_EXTENDED: + src.cp = cp; + dst.cp = (uchar *) dest; + sector = find_sector (info, dest); + + flash_unlock_seq(info,0); + flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER); + switch (info->portwidth) { case FLASH_CFI_8BIT: cnt = len; + flash_write_cmd (info, sector, 0, (uchar) cnt - 1); + while (cnt-- > 0) *dst.cp++ = *src.cp++; break; case FLASH_CFI_16BIT: cnt = len >> 1; + flash_write_cmd (info, sector, 0, (uchar) cnt - 1); + while (cnt-- > 0) *dst.wp++ = *src.wp++; break; case FLASH_CFI_32BIT: cnt = len >> 2; + flash_write_cmd (info, sector, 0, (uchar) cnt - 1); + while (cnt-- > 0) *dst.lp++ = *src.lp++; break; case FLASH_CFI_64BIT: cnt = len >> 3; + flash_write_cmd (info, sector, 0, (uchar) cnt - 1); + while (cnt-- > 0) *dst.llp++ = *src.llp++; break; default: return ERR_INVAL; - break; - } - flash_write_cmd (info, sector, 0, (uchar) cnt - 1); - while (cnt-- > 0) { - switch (info->portwidth) { - case FLASH_CFI_8BIT: - *dst.cp++ = *src.cp++; - break; - case FLASH_CFI_16BIT: - *dst.wp++ = *src.wp++; - break; - case FLASH_CFI_32BIT: - *dst.lp++ = *src.lp++; - break; - case FLASH_CFI_64BIT: - *dst.llp++ = *src.llp++; - break; - default: - return ERR_INVAL; - break; - } } - flash_write_cmd (info, sector, 0, - FLASH_CMD_WRITE_BUFFER_CONFIRM); - retcode = - flash_full_status_check (info, sector, - info->buffer_write_tout, - "buffer write"); + + flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM); + retcode = flash_full_status_check (info, sector, info->buffer_write_tout, + "buffer write"); + return retcode; + + default: + debug ("Unknown Command Set\n"); + return ERR_INVAL; } - flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS); - return retcode; } #endif /* CFG_FLASH_USE_BUFFER_WRITE */ #endif /* CFG_FLASH_CFI */