X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Ffpga%2Ffpga.c;h=7e8bd7eae881d23c641eb1869b099db19c82f652;hb=51b2411946e5f247f26fde41a7227a002270d376;hp=37946d5e183a73d07bff9da4f324c8357a72a89c;hpb=4d16f67e7ba1a69929b55852f1a274c457a0db27;p=u-boot diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c index 37946d5e18..7e8bd7eae8 100644 --- a/drivers/fpga/fpga.c +++ b/drivers/fpga/fpga.c @@ -1,8 +1,7 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2002 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. - * - * SPDX-License-Identifier: GPL-2.0+ */ /* Generic FPGA support */ @@ -31,14 +30,14 @@ static void fpga_no_sup(char *fn, char *msg) else if (msg) printf("No support for %s.\n", msg); else - printf("No FPGA suport!\n"); + printf("No FPGA support!\n"); } /* fpga_get_desc * map a device number to a descriptor */ -static const fpga_desc *const fpga_get_desc(int devnum) +const fpga_desc *const fpga_get_desc(int devnum) { fpga_desc *desc = (fpga_desc *)NULL; @@ -120,7 +119,7 @@ static int fpga_dev_info(int devnum) } /* - * fgpa_init is usually called from misc_init_r() and MUST be called + * fpga_init is usually called from misc_init_r() and MUST be called * before any of the other fpga functions are used. */ void fpga_init(void) @@ -148,20 +147,21 @@ int fpga_add(fpga_type devtype, void *desc) { int devnum = FPGA_INVALID_DEVICE; + if (!desc) { + printf("%s: NULL device descriptor\n", __func__); + return devnum; + } + if (next_desc < 0) { printf("%s: FPGA support not initialized!\n", __func__); } else if ((devtype > fpga_min_type) && (devtype < fpga_undefined)) { - if (desc) { - if (next_desc < CONFIG_MAX_FPGA_DEVICES) { - devnum = next_desc; - desc_table[next_desc].devtype = devtype; - desc_table[next_desc++].devdesc = desc; - } else { - printf("%s: Exceeded Max FPGA device count\n", - __func__); - } + if (next_desc < CONFIG_MAX_FPGA_DEVICES) { + devnum = next_desc; + desc_table[next_desc].devtype = devtype; + desc_table[next_desc++].devdesc = desc; } else { - printf("%s: NULL device descriptor\n", __func__); + printf("%s: Exceeded Max FPGA device count\n", + __func__); } } else { printf("%s: Unsupported FPGA type %d\n", __func__, devtype); @@ -170,6 +170,15 @@ int fpga_add(fpga_type devtype, void *desc) return devnum; } +/* + * Return 1 if the fpga data is partial. + * This is only required for fpga drivers that support bitstream_type. + */ +int __weak fpga_is_partial_data(int devnum, size_t img_len) +{ + return 0; +} + /* * Convert bitstream data and load into the fpga */ @@ -208,6 +217,35 @@ int fpga_fsload(int devnum, const void *buf, size_t size, } #endif +#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) +int fpga_loads(int devnum, const void *buf, size_t size, + struct fpga_secure_info *fpga_sec_info) +{ + int ret_val = FPGA_FAIL; + + const fpga_desc *desc = fpga_validate(devnum, buf, size, + (char *)__func__); + + if (desc) { + switch (desc->devtype) { + case fpga_xilinx: +#if defined(CONFIG_FPGA_XILINX) + ret_val = xilinx_loads(desc->devdesc, buf, size, + fpga_sec_info); +#else + fpga_no_sup((char *)__func__, "Xilinx devices"); +#endif + break; + default: + printf("%s: Invalid or unsupported device type %d\n", + __func__, desc->devtype); + } + } + + return ret_val; +} +#endif + /* * Generic multiplexing code */