X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fgpio%2Fbcm2835_gpio.c;h=fbc641d662e4e481c99ab667107d623a71f78317;hb=ebe78bb993423851b947b1e00f76c835c23e29b5;hp=1d50dbd5e0433d49b6448b6209d206557e7f9835;hpb=7cdcaef0b286fa20926d750304442ad770a1fca8;p=u-boot

diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
index 1d50dbd5e0..fbc641d662 100644
--- a/drivers/gpio/bcm2835_gpio.c
+++ b/drivers/gpio/bcm2835_gpio.c
@@ -2,88 +2,122 @@
  * Copyright (C) 2012 Vikram Narayananan
  * <vikram186@gmail.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
+#include <dm.h>
+#include <errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 
-inline int gpio_is_valid(unsigned gpio)
-{
-	return (gpio < BCM2835_GPIO_COUNT);
-}
-
-int gpio_request(unsigned gpio, const char *label)
-{
-	return !gpio_is_valid(gpio);
-}
-
-int gpio_free(unsigned gpio)
-{
-	return 0;
-}
+struct bcm2835_gpios {
+	struct bcm2835_gpio_regs *reg;
+};
 
-int gpio_direction_input(unsigned gpio)
+static int bcm2835_gpio_direction_input(struct udevice *dev, unsigned gpio)
 {
-	struct bcm2835_gpio_regs *reg =
-		(struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
+	struct bcm2835_gpios *gpios = dev_get_priv(dev);
 	unsigned val;
 
-	val = readl(&reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+	val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
 	val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio));
 	val |= (BCM2835_GPIO_INPUT << BCM2835_GPIO_FSEL_SHIFT(gpio));
-	writel(val, &reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+	writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
 
 	return 0;
 }
 
-int gpio_direction_output(unsigned gpio, int value)
+static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned gpio,
+					 int value)
 {
-	struct bcm2835_gpio_regs *reg =
-		(struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
+	struct bcm2835_gpios *gpios = dev_get_priv(dev);
 	unsigned val;
 
 	gpio_set_value(gpio, value);
 
-	val = readl(&reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+	val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
 	val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio));
 	val |= (BCM2835_GPIO_OUTPUT << BCM2835_GPIO_FSEL_SHIFT(gpio));
-	writel(val, &reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+	writel(val, &gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
 
 	return 0;
 }
 
-int gpio_get_value(unsigned gpio)
+static bool bcm2835_gpio_is_output(const struct bcm2835_gpios *gpios, int gpio)
+{
+	u32 val;
+
+	val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+	val &= BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio);
+	return val ? true : false;
+}
+
+static int bcm2835_get_value(const struct bcm2835_gpios *gpios, unsigned gpio)
 {
-	struct bcm2835_gpio_regs *reg =
-		(struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
 	unsigned val;
 
-	val = readl(&reg->gplev[BCM2835_GPIO_COMMON_BANK(gpio)]);
+	val = readl(&gpios->reg->gplev[BCM2835_GPIO_COMMON_BANK(gpio)]);
 
 	return (val >> BCM2835_GPIO_COMMON_SHIFT(gpio)) & 0x1;
 }
 
-int gpio_set_value(unsigned gpio, int value)
+static int bcm2835_gpio_get_value(struct udevice *dev, unsigned gpio)
+{
+	const struct bcm2835_gpios *gpios = dev_get_priv(dev);
+
+	return bcm2835_get_value(gpios, gpio);
+}
+
+static int bcm2835_gpio_set_value(struct udevice *dev, unsigned gpio,
+				  int value)
 {
-	struct bcm2835_gpio_regs *reg =
-		(struct bcm2835_gpio_regs *)BCM2835_GPIO_BASE;
-	u32 *output_reg = value ? reg->gpset : reg->gpclr;
+	struct bcm2835_gpios *gpios = dev_get_priv(dev);
+	u32 *output_reg = value ? gpios->reg->gpset : gpios->reg->gpclr;
 
 	writel(1 << BCM2835_GPIO_COMMON_SHIFT(gpio),
 				&output_reg[BCM2835_GPIO_COMMON_BANK(gpio)]);
 
 	return 0;
 }
+
+static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset)
+{
+	struct bcm2835_gpios *gpios = dev_get_priv(dev);
+
+	/* GPIOF_FUNC is not implemented yet */
+	if (bcm2835_gpio_is_output(gpios, offset))
+		return GPIOF_OUTPUT;
+	else
+		return GPIOF_INPUT;
+}
+
+
+static const struct dm_gpio_ops gpio_bcm2835_ops = {
+	.direction_input	= bcm2835_gpio_direction_input,
+	.direction_output	= bcm2835_gpio_direction_output,
+	.get_value		= bcm2835_gpio_get_value,
+	.set_value		= bcm2835_gpio_set_value,
+	.get_function		= bcm2835_gpio_get_function,
+};
+
+static int bcm2835_gpio_probe(struct udevice *dev)
+{
+	struct bcm2835_gpios *gpios = dev_get_priv(dev);
+	struct bcm2835_gpio_platdata *plat = dev_get_platdata(dev);
+	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+	uc_priv->bank_name = "GPIO";
+	uc_priv->gpio_count = BCM2835_GPIO_COUNT;
+	gpios->reg = (struct bcm2835_gpio_regs *)plat->base;
+
+	return 0;
+}
+
+U_BOOT_DRIVER(gpio_bcm2835) = {
+	.name	= "gpio_bcm2835",
+	.id	= UCLASS_GPIO,
+	.ops	= &gpio_bcm2835_ops,
+	.probe	= bcm2835_gpio_probe,
+	.priv_auto_alloc_size = sizeof(struct bcm2835_gpios),
+};