X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fgpio%2Ftegra_gpio.c;h=302efddc2729aa00b3598d35342e1a8adb77994c;hb=93a8ed868583460ab9f3796fdc92f4713bf759a9;hp=5a031159ca370c423455e0fdebcf8965dc8fb962;hpb=20680b560a17fb29c862de77930cfbf76b24f83c;p=u-boot

diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c
index 5a031159ca..302efddc27 100644
--- a/drivers/gpio/tegra_gpio.c
+++ b/drivers/gpio/tegra_gpio.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * NVIDIA Tegra20 GPIO handling.
  *  (C) Copyright 2010-2012,2015
  *  NVIDIA Corporation <www.nvidia.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
@@ -23,8 +22,6 @@
 #include <dm/device-internal.h>
 #include <dt-bindings/gpio/gpio.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 static const int CONFIG_SFIO = 0;
 static const int CONFIG_GPIO = 1;
 static const int DIRECTION_INPUT = 0;
@@ -236,7 +233,7 @@ static int tegra_gpio_get_function(struct udevice *dev, unsigned offset)
 }
 
 static int tegra_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
-			    struct fdtdec_phandle_args *args)
+			    struct ofnode_phandle_args *args)
 {
 	int gpio, port, ret;
 
@@ -337,10 +334,13 @@ static int gpio_tegra_bind(struct udevice *parent)
 	 * This driver does not make use of interrupts, other than to figure
 	 * out the number of GPIO banks
 	 */
-	if (!fdt_getprop(gd->fdt_blob, parent->of_offset, "interrupts", &len))
-		return -EINVAL;
+	len = dev_read_size(parent, "interrupts");
+	if (len < 0)
+		return len;
 	bank_count = len / 3 / sizeof(u32);
-	ctlr = (struct gpio_ctlr *)dev_get_addr(parent);
+	ctlr = (struct gpio_ctlr *)dev_read_addr(parent);
+	if ((ulong)ctlr == FDT_ADDR_T_NONE)
+		return -EINVAL;
 	}
 #endif
 	for (bank = 0; bank < bank_count; bank++) {
@@ -363,7 +363,7 @@ static int gpio_tegra_bind(struct udevice *parent)
 					  plat->port_name, plat, -1, &dev);
 			if (ret)
 				return ret;
-			dev->of_offset = parent->of_offset;
+			dev_set_of_offset(dev, dev_of_offset(parent));
 		}
 	}