X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fi2c%2Fmv_i2c.h;h=ec2d439e31708ecf2ef7601bdbe3a42477928f93;hb=77b5ba5d2b94c5b028991c82782493f64bd4f392;hp=ae27c447b0652d01e13d5f9a445424a40fd16c2f;hpb=5b9c79a81db80c3f9e50c77477957cd803429af8;p=u-boot

diff --git a/drivers/i2c/mv_i2c.h b/drivers/i2c/mv_i2c.h
index ae27c447b0..ec2d439e31 100644
--- a/drivers/i2c/mv_i2c.h
+++ b/drivers/i2c/mv_i2c.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2011
  * Marvell Inc, <www.marvell.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _MV_I2C_H_
@@ -23,12 +22,7 @@ extern void i2c_clk_enable(void);
 #define I2C_READ		0
 #define I2C_WRITE		1
 
-#if (CONFIG_SYS_I2C_SPEED == 400000)
-#define I2C_ICR_INIT	(ICR_FM | ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD \
-		| ICR_SCLE)
-#else
 #define I2C_ICR_INIT	(ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE)
-#endif
 
 #define I2C_ISR_INIT		0x7FF
 /* ----- Control register bits ---------------------------------------- */
@@ -48,7 +42,15 @@ extern void i2c_clk_enable(void);
 #define ICR_ALDIE	0x1000		/* enable arbitration interrupt */
 #define ICR_SADIE	0x2000		/* slave address detected int enable */
 #define ICR_UR		0x4000		/* unit reset */
-#define ICR_FM		0x8000		/* Fast Mode */
+#ifdef CONFIG_ARMADA_3700
+#define ICR_SM		0x00000		/* Standard Mode */
+#define ICR_FM		0x10000		/* Fast Mode */
+#define ICR_MODE_MASK	0x30000		/* Mode mask */
+#else
+#define ICR_SM		0x00000		/* Standard Mode */
+#define ICR_FM		0x08000		/* Fast Mode */
+#define ICR_MODE_MASK	0x18000		/* Mode mask */
+#endif
 
 /* ----- Status register bits ----------------------------------------- */