X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fi2c%2Fsoft_i2c.c;h=69b5f42205f427255344ad55913896d426774464;hb=127cec1889c7a9bb3c3eab521779b08657043a9a;hp=f12dedf89a971b37c21651c73ea505417c159302;hpb=ecf5f077c8e77454f532eaac3e3afb7cfc48c62d;p=u-boot

diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index f12dedf89a..69b5f42205 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -30,9 +30,13 @@
 #include <ioports.h>
 #include <asm/io.h>
 #endif
-#ifdef	CONFIG_AT91RM9200		/* need this for the at91rm9200 */
+#if defined(CONFIG_AT91FAMILY)
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/at91_pio.h>
+#ifdef CONFIG_AT91_LEGACY
+#include <asm/arch/gpio.h>
+#endif
 #endif
 #ifdef	CONFIG_IXP425			/* only valid for IXP425 */
 #include <asm/arch/ixp425.h>
@@ -40,25 +44,75 @@
 #ifdef CONFIG_LPC2292
 #include <asm/arch/hardware.h>
 #endif
-#ifdef	CONFIG_MPC866			/* only valid for MPC866 */
+#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
 #include <asm/io.h>
 #endif
 #include <i2c.h>
 
+#if defined(CONFIG_SOFT_I2C_GPIO_SCL)
+# include <asm/gpio.h>
+
+# ifndef I2C_GPIO_SYNC
+#  define I2C_GPIO_SYNC
+# endif
+
+# ifndef I2C_INIT
+#  define I2C_INIT \
+	do { \
+		gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
+		gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
+	} while (0)
+# endif
+
+# ifndef I2C_ACTIVE
+#  define I2C_ACTIVE do { } while (0)
+# endif
+
+# ifndef I2C_TRISTATE
+#  define I2C_TRISTATE do { } while (0)
+# endif
+
+# ifndef I2C_READ
+#  define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
+# endif
+
+# ifndef I2C_SDA
+#  define I2C_SDA(bit) \
+	do { \
+		if (bit) \
+			gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
+		else \
+			gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
+		I2C_GPIO_SYNC; \
+	} while (0)
+# endif
+
+# ifndef I2C_SCL
+#  define I2C_SCL(bit) \
+	do { \
+		gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
+		I2C_GPIO_SYNC; \
+	} while (0)
+# endif
+
+# ifndef I2C_DELAY
+#  define I2C_DELAY udelay(5)	/* 1/4 I2C clock duration */
+# endif
+
+#endif
+
 /* #define	DEBUG_I2C	*/
 
 #ifdef DEBUG_I2C
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
-
 /*-----------------------------------------------------------------------
  * Definitions
  */
 
 #define RETRIES		0
 
-
 #define I2C_ACK		0		/* PD_SDA level to ack a byte */
 #define I2C_NOACK	1		/* PD_SDA level to noack a byte */
 
@@ -154,7 +208,6 @@ static void send_stop(void)
 	I2C_TRISTATE;
 }
 
-
 /*-----------------------------------------------------------------------
  * ack should be I2C_ACK or I2C_NOACK
  */
@@ -174,7 +227,6 @@ static void send_ack(int ack)
 	I2C_DELAY;
 }
 
-
 /*-----------------------------------------------------------------------
  * Send 8 bits and look for an acknowledgement.
  */
@@ -246,20 +298,6 @@ int i2c_set_bus_num(unsigned int bus)
 #endif
 	return 0;
 }
-
-/* TODO: add 100/400k switching */
-unsigned int i2c_get_bus_speed(void)
-{
-	return CONFIG_SYS_I2C_SPEED;
-}
-
-int i2c_set_bus_speed(unsigned int speed)
-{
-	if (speed != CONFIG_SYS_I2C_SPEED)
-		return -1;
-
-	return 0;
-}
 #endif
 
 /*-----------------------------------------------------------------------
@@ -385,8 +423,18 @@ int  i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 			}
 			shift -= 8;
 		}
-		send_stop();	/* reportedly some chips need a full stop */
+
+		/* Some I2C chips need a stop/start sequence here,
+		 * other chips don't work with a full stop and need
+		 * only a start.  Default behaviour is to send the
+		 * stop/start sequence.
+		 */
+#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
 		send_start();
+#else
+		send_stop();
+		send_start();
+#endif
 	}
 	/*
 	 * Send the chip address again, this time for a read cycle.
@@ -434,4 +482,3 @@ int  i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 	send_stop();
 	return(failures);
 }
-