X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fmmc%2Fgen_atmel_mci.c;h=0474a15484348917c8834a554c5b5fe9188330c5;hb=33fb211dd2706e666db4008801dc0d5903fd82f6;hp=74d53a3140bada62e8f5d2309a45924ca7b4c693;hpb=6b75d35949968ea2083d5778de6882e175ecc3d0;p=u-boot diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c index 74d53a3140..0474a15484 100644 --- a/drivers/mmc/gen_atmel_mci.c +++ b/drivers/mmc/gen_atmel_mci.c @@ -35,10 +35,10 @@ struct atmel_mci_priv { struct mmc_config cfg; struct atmel_mci *mci; + unsigned int initialized:1; + unsigned int curr_clk; }; -static int initialized = 0; - /* Read Atmel MCI IP version */ static unsigned int atmel_mci_get_version(struct atmel_mci *mci) { @@ -92,7 +92,10 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen) } } - + if (version >= 0x500) + priv->curr_clk = bus_hz / (clkdiv * 2 + clkodd + 2); + else + priv->curr_clk = (bus_hz / (clkdiv + 1)) / 2; blklen &= 0xfffc; mr = MMCI_BF(CLKDIV, clkdiv); @@ -119,9 +122,7 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen) if (mmc->card_caps & mmc->cfg->host_caps & MMC_MODE_HS) writel(MMCI_BIT(HSMODE), &mci->cfg); - udelay(50); - - initialized = 1; + priv->initialized = 1; } /* Return the CMDR with flags for a given command and data packet */ @@ -210,7 +211,7 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) u32 error_flags = 0; u32 status; - if (!initialized) { + if (!priv->initialized) { puts ("MCI not initialized!\n"); return COMM_ERR; } @@ -324,6 +325,13 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) } } + /* + * After the switch command, wait for 8 clocks before the next + * command + */ + if (cmd->cmdidx == MMC_CMD_SWITCH) + udelay(8*1000000 / priv->curr_clk); /* 8 clk in us */ + return 0; } @@ -415,6 +423,7 @@ int atmel_mci_init(void *regs) cfg->ops = &atmel_mci_ops; priv->mci = (struct atmel_mci *)regs; + priv->initialized = 0; /* need to be able to pass these in on a board by board basis */ cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;