X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fmmc%2Fmmc-uclass.c;h=a3536b15ae677596c403b01e8a805d0f6df65061;hb=12a510e23fecbd4a7697595c0d9ca24d8ce3407c;hp=994d2686f46e647266a6bedbd625fb494a0e4d4c;hpb=235c5b8315c6a9eb566fd3d99a098cc6db869fc5;p=u-boot diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c index 994d2686f4..a3536b15ae 100644 --- a/drivers/mmc/mmc-uclass.c +++ b/drivers/mmc/mmc-uclass.c @@ -10,12 +10,10 @@ #include #include #include -#include #include "mmc_private.h" DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_DM_MMC_OPS int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data) { @@ -52,6 +50,35 @@ int mmc_set_ios(struct mmc *mmc) return dm_mmc_set_ios(mmc->dev); } +void dm_mmc_send_init_stream(struct udevice *dev) +{ + struct dm_mmc_ops *ops = mmc_get_ops(dev); + + if (ops->send_init_stream) + ops->send_init_stream(dev); +} + +void mmc_send_init_stream(struct mmc *mmc) +{ + dm_mmc_send_init_stream(mmc->dev); +} + +#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) +int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout) +{ + struct dm_mmc_ops *ops = mmc_get_ops(dev); + + if (!ops->wait_dat0) + return -ENOSYS; + return ops->wait_dat0(dev, state, timeout); +} + +int mmc_wait_dat0(struct mmc *mmc, int state, int timeout) +{ + return dm_mmc_wait_dat0(mmc->dev, state, timeout); +} +#endif + int dm_mmc_get_wp(struct udevice *dev) { struct dm_mmc_ops *ops = mmc_get_ops(dev); @@ -79,8 +106,73 @@ int mmc_getcd(struct mmc *mmc) { return dm_mmc_get_cd(mmc->dev); } + +#ifdef MMC_SUPPORTS_TUNING +int dm_mmc_execute_tuning(struct udevice *dev, uint opcode) +{ + struct dm_mmc_ops *ops = mmc_get_ops(dev); + + if (!ops->execute_tuning) + return -ENOSYS; + return ops->execute_tuning(dev, opcode); +} + +int mmc_execute_tuning(struct mmc *mmc, uint opcode) +{ + return dm_mmc_execute_tuning(mmc->dev, opcode); +} #endif +int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg) +{ + int val; + + val = dev_read_u32_default(dev, "bus-width", 1); + + switch (val) { + case 0x8: + cfg->host_caps |= MMC_MODE_8BIT; + /* fall through */ + case 0x4: + cfg->host_caps |= MMC_MODE_4BIT; + /* fall through */ + case 0x1: + cfg->host_caps |= MMC_MODE_1BIT; + break; + default: + dev_err(dev, "Invalid \"bus-width\" value %u!\n", val); + return -EINVAL; + } + + /* f_max is obtained from the optional "max-frequency" property */ + dev_read_u32(dev, "max-frequency", &cfg->f_max); + + if (dev_read_bool(dev, "cap-sd-highspeed")) + cfg->host_caps |= MMC_CAP(SD_HS); + if (dev_read_bool(dev, "cap-mmc-highspeed")) + cfg->host_caps |= MMC_CAP(MMC_HS); + if (dev_read_bool(dev, "sd-uhs-sdr12")) + cfg->host_caps |= MMC_CAP(UHS_SDR12); + if (dev_read_bool(dev, "sd-uhs-sdr25")) + cfg->host_caps |= MMC_CAP(UHS_SDR25); + if (dev_read_bool(dev, "sd-uhs-sdr50")) + cfg->host_caps |= MMC_CAP(UHS_SDR50); + if (dev_read_bool(dev, "sd-uhs-sdr104")) + cfg->host_caps |= MMC_CAP(UHS_SDR104); + if (dev_read_bool(dev, "sd-uhs-ddr50")) + cfg->host_caps |= MMC_CAP(UHS_DDR50); + if (dev_read_bool(dev, "mmc-ddr-1_8v")) + cfg->host_caps |= MMC_CAP(MMC_DDR_52); + if (dev_read_bool(dev, "mmc-ddr-1_2v")) + cfg->host_caps |= MMC_CAP(MMC_DDR_52); + if (dev_read_bool(dev, "mmc-hs200-1_8v")) + cfg->host_caps |= MMC_CAP(MMC_HS_200); + if (dev_read_bool(dev, "mmc-hs200-1_2v")) + cfg->host_caps |= MMC_CAP(MMC_HS_200); + + return 0; +} + struct mmc *mmc_get_mmc_dev(struct udevice *dev) { struct mmc_uclass_priv *upriv; @@ -91,7 +183,7 @@ struct mmc *mmc_get_mmc_dev(struct udevice *dev) return upriv->mmc; } -#ifdef CONFIG_BLK +#if CONFIG_IS_ENABLED(BLK) struct mmc *find_mmc_device(int dev_num) { struct udevice *dev, *mmc_dev; @@ -198,10 +290,8 @@ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg) struct udevice *bdev; int ret, devnum = -1; -#ifdef CONFIG_DM_MMC_OPS if (!mmc_get_ops(dev)) return -ENOSYS; -#endif #ifndef CONFIG_SPL_BUILD /* Use the fixed index with aliase node's index */ ret = dev_read_alias_seq(dev, &devnum); @@ -279,7 +369,7 @@ static int mmc_blk_probe(struct udevice *dev) static const struct blk_ops mmc_blk_ops = { .read = mmc_bread, -#ifndef CONFIG_SPL_BUILD +#if CONFIG_IS_ENABLED(MMC_WRITE) .write = mmc_bwrite, .erase = mmc_berase, #endif