X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fmmc%2Fs5p_mmc.c;h=7786ecf2be87e02ed5727082326f8b15d5632ddf;hb=4d28db8a1e8b90e1e3ffd95d7f949b849e33fa2f;hp=668c28bded9c0b505235f0828a3c2b8d3ee26de3;hpb=aeabdeb7a33c9cff9ae0cd804521d0d691a7c341;p=u-boot diff --git a/drivers/mmc/s5p_mmc.c b/drivers/mmc/s5p_mmc.c index 668c28bded..7786ecf2be 100644 --- a/drivers/mmc/s5p_mmc.c +++ b/drivers/mmc/s5p_mmc.c @@ -22,6 +22,7 @@ #include #include #include +#include /* support 4 mmc hosts */ struct mmc mmc_dev[4]; @@ -231,9 +232,15 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, __func__, mask); return -1; } else if (mask & (1 << 3)) { - /* DMA Interrupt */ + /* + * DMA Interrupt, restart the transfer where + * it was interrupted. + */ + unsigned int address = readl(&host->reg->sysad); + debug("DMA end\n"); - break; + writel((1 << 3), &host->reg->norintsts); + writel(address, &host->reg->sysad); } else if (mask & (1 << 1)) { /* Transfer Complete */ debug("r/w is done\n"); @@ -291,6 +298,8 @@ static void mmc_change_clock(struct mmc_host *host, uint clock) clk = (div << 8) | (1 << 0); writew(clk, &host->reg->clkcon); + set_mmc_clk(host->dev_index, div); + /* Wait max 10 ms */ timeout = 10; while (!(readw(&host->reg->clkcon) & (1 << 1))) { @@ -422,12 +431,13 @@ static int mmc_core_init(struct mmc *mmc) * NORMAL Interrupt Status Enable Register init * [5] ENSTABUFRDRDY : Buffer Read Ready Status Enable * [4] ENSTABUFWTRDY : Buffer write Ready Status Enable + * [3] ENSTADMAINT : DMA Interrupt Status Enable * [1] ENSTASTANSCMPLT : Transfre Complete Status Enable * [0] ENSTACMDCMPLT : Command Complete Status Enable - */ + */ mask = readl(&host->reg->norintstsen); mask &= ~(0xffff); - mask |= (1 << 5) | (1 << 4) | (1 << 1) | (1 << 0); + mask |= (1 << 5) | (1 << 4) | (1 << 3) | (1 << 1) | (1 << 0); writel(mask, &host->reg->norintstsen); /* @@ -459,14 +469,15 @@ static int s5p_mmc_initialize(int dev_index, int bus_width) mmc->host_caps = MMC_MODE_8BIT; else mmc->host_caps = MMC_MODE_4BIT; - mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; + mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC; mmc->f_min = 400000; mmc->f_max = 52000000; + mmc_host[dev_index].dev_index = dev_index; mmc_host[dev_index].clock = 0; mmc_host[dev_index].reg = s5p_get_base_mmc(dev_index); - mmc->m_bmax = 0; + mmc->b_max = 0; mmc_register(mmc); return 0;