X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fmmc%2Fs5p_sdhci.c;h=1f1d2ed8652ec639459823eff5eb9d45c8d6c7aa;hb=39fbb56f845431686966a90456bd232f0b355dbd;hp=40ff8739bfeae6ba48bb2f9497d61f8d8061afb3;hpb=f835c77fb7e57508ffe8d8ca3a092ee28add77b2;p=u-boot diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 40ff8739bf..1f1d2ed865 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -6,10 +6,25 @@ */ #include +#include #include #include +#include +#include +#include #include #include +#include +#include + +#ifdef CONFIG_DM_MMC +struct s5p_sdhci_plat { + struct mmc_config cfg; + struct mmc mmc; +}; + +DECLARE_GLOBAL_DATA_PTR; +#endif static char *S5P_NAME = "SAMSUNG SDHCI"; static void s5p_sdhci_set_control_reg(struct sdhci_host *host) @@ -25,7 +40,7 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host) sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4); val = sdhci_readl(host, SDHCI_CONTROL2); - val &= SDHCI_CTRL2_SELBASECLK_SHIFT; + val &= SDHCI_CTRL2_SELBASECLK_MASK(3); val |= SDHCI_CTRL2_ENSTAASYNCCLR | SDHCI_CTRL2_ENCMDCNFMSK | @@ -58,31 +73,224 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host) sdhci_writel(host, ctrl, SDHCI_CONTROL2); } -int s5p_sdhci_init(u32 regbase, int index, int bus_width) +static void s5p_set_clock(struct sdhci_host *host, u32 div) { - struct sdhci_host *host = NULL; - host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host)); - if (!host) { - printf("sdhci__host malloc fail!\n"); - return 1; - } + /* ToDo : Use the Clock Framework */ + set_mmc_clk(host->index, div); +} + +static const struct sdhci_ops s5p_sdhci_ops = { + .set_clock = &s5p_set_clock, + .set_control_reg = &s5p_sdhci_set_control_reg, +}; +static int s5p_sdhci_core_init(struct sdhci_host *host) +{ host->name = S5P_NAME; - host->ioaddr = (void *)regbase; host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE | - SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR | + SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8; host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - host->version = sdhci_readw(host, SDHCI_HOST_VERSION); + host->ops = &s5p_sdhci_ops; - host->set_control_reg = &s5p_sdhci_set_control_reg; - host->set_clock = set_mmc_clk; - host->index = index; - - host->host_caps = MMC_MODE_HC; - if (bus_width == 8) + if (host->bus_width == 8) host->host_caps |= MMC_MODE_8BIT; +#ifndef CONFIG_BLK return add_sdhci(host, 52000000, 400000); +#else + return 0; +#endif } + +int s5p_sdhci_init(u32 regbase, int index, int bus_width) +{ + struct sdhci_host *host = calloc(1, sizeof(struct sdhci_host)); + if (!host) { + printf("sdhci__host allocation fail!\n"); + return -ENOMEM; + } + host->ioaddr = (void *)regbase; + host->index = index; + host->bus_width = bus_width; + + return s5p_sdhci_core_init(host); +} + +#if CONFIG_IS_ENABLED(OF_CONTROL) +struct sdhci_host sdhci_host[SDHCI_MAX_HOSTS]; + +static int do_sdhci_init(struct sdhci_host *host) +{ + int dev_id, flag, ret; + + flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; + dev_id = host->index + PERIPH_ID_SDMMC0; + + ret = exynos_pinmux_config(dev_id, flag); + if (ret) { + printf("external SD not configured\n"); + return ret; + } + + if (dm_gpio_is_valid(&host->pwr_gpio)) { + dm_gpio_set_value(&host->pwr_gpio, 1); + ret = exynos_pinmux_config(dev_id, flag); + if (ret) { + debug("MMC not configured\n"); + return ret; + } + } + + if (dm_gpio_is_valid(&host->cd_gpio)) { + ret = dm_gpio_get_value(&host->cd_gpio); + if (ret) { + debug("no SD card detected (%d)\n", ret); + return -ENODEV; + } + } + + return s5p_sdhci_core_init(host); +} + +static int sdhci_get_config(const void *blob, int node, struct sdhci_host *host) +{ + int bus_width, dev_id; + unsigned int base; + + /* Get device id */ + dev_id = pinmux_decode_periph_id(blob, node); + if (dev_id < PERIPH_ID_SDMMC0 || dev_id > PERIPH_ID_SDMMC3) { + debug("MMC: Can't get device id\n"); + return -EINVAL; + } + host->index = dev_id - PERIPH_ID_SDMMC0; + + /* Get bus width */ + bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0); + if (bus_width <= 0) { + debug("MMC: Can't get bus-width\n"); + return -EINVAL; + } + host->bus_width = bus_width; + + /* Get the base address from the device node */ + base = fdtdec_get_addr(blob, node, "reg"); + if (!base) { + debug("MMC: Can't get base address\n"); + return -EINVAL; + } + host->ioaddr = (void *)base; + + gpio_request_by_name_nodev(blob, node, "pwr-gpios", 0, &host->pwr_gpio, + GPIOD_IS_OUT); + gpio_request_by_name_nodev(blob, node, "cd-gpios", 0, &host->cd_gpio, + GPIOD_IS_IN); + + return 0; +} + +static int process_nodes(const void *blob, int node_list[], int count) +{ + struct sdhci_host *host; + int i, node, ret; + int failed = 0; + + debug("%s: count = %d\n", __func__, count); + + /* build sdhci_host[] for each controller */ + for (i = 0; i < count; i++) { + node = node_list[i]; + if (node <= 0) + continue; + + host = &sdhci_host[i]; + + ret = sdhci_get_config(blob, node, host); + if (ret) { + printf("%s: failed to decode dev %d (%d)\n", __func__, i, ret); + failed++; + continue; + } + + ret = do_sdhci_init(host); + if (ret && ret != -ENODEV) { + printf("%s: failed to initialize dev %d (%d)\n", __func__, i, ret); + failed++; + } + } + + /* we only consider it an error when all nodes fail */ + return (failed == count ? -1 : 0); +} + +int exynos_mmc_init(const void *blob) +{ + int count; + int node_list[SDHCI_MAX_HOSTS]; + + count = fdtdec_find_aliases_for_id(blob, "mmc", + COMPAT_SAMSUNG_EXYNOS_MMC, node_list, + SDHCI_MAX_HOSTS); + + return process_nodes(blob, node_list, count); +} +#endif + +#ifdef CONFIG_DM_MMC +static int s5p_sdhci_probe(struct udevice *dev) +{ + struct s5p_sdhci_plat *plat = dev_get_platdata(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct sdhci_host *host = dev_get_priv(dev); + int ret; + + ret = sdhci_get_config(gd->fdt_blob, dev->of_offset, host); + if (ret) + return ret; + + ret = do_sdhci_init(host); + if (ret) + return ret; + + ret = sdhci_setup_cfg(&plat->cfg, host, 52000000, 400000); + if (ret) + return ret; + + host->mmc = &plat->mmc; + host->mmc->priv = host; + host->mmc->dev = dev; + upriv->mmc = host->mmc; + + return sdhci_probe(dev); +} + +static int s5p_sdhci_bind(struct udevice *dev) +{ + struct s5p_sdhci_plat *plat = dev_get_platdata(dev); + int ret; + + ret = sdhci_bind(dev, &plat->mmc, &plat->cfg); + if (ret) + return ret; + + return 0; +} + +static const struct udevice_id s5p_sdhci_ids[] = { + { .compatible = "samsung,exynos4412-sdhci"}, + { } +}; + +U_BOOT_DRIVER(s5p_sdhci_drv) = { + .name = "s5p_sdhci", + .id = UCLASS_MMC, + .of_match = s5p_sdhci_ids, + .bind = s5p_sdhci_bind, + .ops = &sdhci_ops, + .probe = s5p_sdhci_probe, + .priv_auto_alloc_size = sizeof(struct sdhci_host), + .platdata_auto_alloc_size = sizeof(struct s5p_sdhci_plat), +}; +#endif /* CONFIG_DM_MMC */