X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fmtd%2Fnand%2Ffsl_upm.c;h=5426c32114162446fa4c07abc2d5e8a2796d6ef9;hb=0985294604bb713d56c8dbedf1da462c7f86f90f;hp=7cb99cbc074b7bb3c020b20e32dd86a8d32ae513;hpb=33846df28fa1f4cf96a96c18142d48d813caa892;p=u-boot diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index 7cb99cbc07..5426c32114 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c @@ -4,10 +4,7 @@ * Copyright (C) 2007 MontaVista Software, Inc. * Anton Vorontsov * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. + * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -21,6 +18,7 @@ static void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset) { clrsetbits_be32(upm->mxmr, MxMR_MAD_MSK, MxMR_OP_RUNP | pat_offset); + (void)in_be32(upm->mxmr); } static void fsl_upm_end_pattern(struct fsl_upm *upm) @@ -35,6 +33,7 @@ static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, void __iomem *io_addr, u32 mar) { out_be32(upm->mar, mar); + (void)in_be32(upm->mar); switch (width) { case 8: out_8(io_addr, 0x0); @@ -55,7 +54,7 @@ static void fun_wait(struct fsl_upm_nand *fun) debug("unexpected busy state\n"); } else { /* - * If the R/B pin is not connected, like on the TQM8548, + * If the R/B pin is not connected, * a short delay is necessary. */ udelay(1); @@ -113,23 +112,23 @@ static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) fsl_upm_run_pattern(&fun->upm, fun->width, io_addr, mar); /* - * Some boards/chips needs this. At least the MPC8360E-RDK and - * TQM8548 need it. Probably weird chip, because I don't see - * any need for this on MPC8555E + Samsung K9F1G08U0A. Usually + * Some boards/chips needs this. At least the MPC8360E-RDK + * needs it. Probably weird chip, because I don't see any + * need for this on MPC8555E + Samsung K9F1G08U0A. Usually * here are 0-2 unexpected busy states per block read. */ if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN) fun_wait(fun); } -static u8 nand_read_byte(struct mtd_info *mtd) +static u8 upm_nand_read_byte(struct mtd_info *mtd) { struct nand_chip *chip = mtd->priv; return in_8(chip->IO_ADDR_R); } -static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) +static void upm_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) { int i; struct nand_chip *chip = mtd->priv; @@ -145,7 +144,7 @@ static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) fun_wait(fun); } -static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) +static void upm_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) { int i; struct nand_chip *chip = mtd->priv; @@ -154,19 +153,6 @@ static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) buf[i] = in_8(chip->IO_ADDR_R); } -static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) -{ - int i; - struct nand_chip *chip = mtd->priv; - - for (i = 0; i < len; i++) { - if (buf[i] != in_8(chip->IO_ADDR_R)) - return -EFAULT; - } - - return 0; -} - static int nand_dev_ready(struct mtd_info *mtd) { struct nand_chip *chip = mtd->priv; @@ -189,10 +175,9 @@ int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun) #if CONFIG_SYS_NAND_MAX_CHIPS > 1 chip->select_chip = fun_select_chip; #endif - chip->read_byte = nand_read_byte; - chip->read_buf = nand_read_buf; - chip->write_buf = nand_write_buf; - chip->verify_buf = nand_verify_buf; + chip->read_byte = upm_nand_read_byte; + chip->read_buf = upm_nand_read_buf; + chip->write_buf = upm_nand_write_buf; if (fun->dev_ready) chip->dev_ready = nand_dev_ready;