X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fmtd%2Fnand%2Fkirkwood_nand.c;h=0757fa840b880c38a3477f6a1e8f01639f19344b;hb=ebbc23a0495cd189cda2760f66cc0195dd030a19;hp=4fc34d6b9fca6d7b41ff44f52912da85532d1b9b;hpb=1fba907f9a8d178eee960294ecffc8ee8bc6b00d;p=u-boot diff --git a/drivers/mtd/nand/kirkwood_nand.c b/drivers/mtd/nand/kirkwood_nand.c index 4fc34d6b9f..0757fa840b 100644 --- a/drivers/mtd/nand/kirkwood_nand.c +++ b/drivers/mtd/nand/kirkwood_nand.c @@ -1,14 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2009 * Marvell Semiconductor * Written-by: Prafulla Wadaskar - * - * SPDX-License-Identifier: GPL-2.0+ */ #include #include #include +#include #include /* NAND Flash Soc registers */ @@ -22,6 +22,8 @@ struct kwnandf_registers { static struct kwnandf_registers *nf_reg = (struct kwnandf_registers *)KW_NANDF_BASE; +static u32 nand_mpp_backup[9] = { 0 }; + /* * hardware specific access to control-lines/bits */ @@ -30,7 +32,7 @@ static struct kwnandf_registers *nf_reg = static void kw_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - struct nand_chip *nc = mtd->priv; + struct nand_chip *nc = mtd_to_nand(mtd); u32 offs; if (cmd == NAND_CMD_NONE) @@ -49,6 +51,22 @@ static void kw_nand_hwcontrol(struct mtd_info *mtd, int cmd, void kw_nand_select_chip(struct mtd_info *mtd, int chip) { u32 data; + static const u32 nand_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP18_NF_IO0, + MPP19_NF_IO1, + 0 + }; + + if (chip >= 0) + kirkwood_mpp_conf(nand_config, nand_mpp_backup); + else + kirkwood_mpp_conf(nand_mpp_backup, NULL); data = readl(&nf_reg->ctrl); data |= NAND_ACTCEBOOT_BIT;