X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fmtd%2Fnand%2Fkirkwood_nand.c;h=d734113f640ca365055c91524384dd62bd57e9ae;hb=f3c264f9de6a5727c90ecf6d46d4747091c0a57f;hp=4fc34d6b9fca6d7b41ff44f52912da85532d1b9b;hpb=3dc23f7852158fafde9eb736060f9e8131997f19;p=u-boot diff --git a/drivers/mtd/nand/kirkwood_nand.c b/drivers/mtd/nand/kirkwood_nand.c index 4fc34d6b9f..d734113f64 100644 --- a/drivers/mtd/nand/kirkwood_nand.c +++ b/drivers/mtd/nand/kirkwood_nand.c @@ -9,6 +9,7 @@ #include #include #include +#include #include /* NAND Flash Soc registers */ @@ -22,6 +23,8 @@ struct kwnandf_registers { static struct kwnandf_registers *nf_reg = (struct kwnandf_registers *)KW_NANDF_BASE; +static u32 nand_mpp_backup[9] = { 0 }; + /* * hardware specific access to control-lines/bits */ @@ -49,6 +52,22 @@ static void kw_nand_hwcontrol(struct mtd_info *mtd, int cmd, void kw_nand_select_chip(struct mtd_info *mtd, int chip) { u32 data; + static const u32 nand_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP18_NF_IO0, + MPP19_NF_IO1, + 0 + }; + + if (chip >= 0) + kirkwood_mpp_conf(nand_config, nand_mpp_backup); + else + kirkwood_mpp_conf(nand_mpp_backup, NULL); data = readl(&nf_reg->ctrl); data |= NAND_ACTCEBOOT_BIT;