X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fmtd%2Fnand%2Fnand.c;h=4cf4c1c7076c1f933bb77086f68fd3894e98a6f3;hb=638b3e8342e4b395f9e961bfac200420f29874a3;hp=e44470eb6cc8a7b79088a2a2ccec61c7174477aa;hpb=c4b81f3238d77a4df343bd70ddfb7ebd29ca1dda;p=u-boot diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c index e44470eb6c..4cf4c1c707 100644 --- a/drivers/mtd/nand/nand.c +++ b/drivers/mtd/nand/nand.c @@ -22,62 +22,99 @@ */ #include - -#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY) - #include +#include -#ifndef CFG_NAND_BASE_LIST -#define CFG_NAND_BASE_LIST { CFG_NAND_BASE } +#ifndef CONFIG_SYS_NAND_BASE_LIST +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #endif +DECLARE_GLOBAL_DATA_PTR; + int nand_curr_device = -1; -nand_info_t nand_info[CFG_MAX_NAND_DEVICE]; -static struct nand_chip nand_chip[CFG_MAX_NAND_DEVICE]; -static ulong base_address[CFG_MAX_NAND_DEVICE] = CFG_NAND_BASE_LIST; -static const char default_nand_name[] = "nand"; +nand_info_t nand_info[CONFIG_SYS_MAX_NAND_DEVICE]; + +#ifndef CONFIG_SYS_NAND_SELF_INIT +static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; +static ulong base_address[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIST; +#endif + +static char dev_name[CONFIG_SYS_MAX_NAND_DEVICE][8]; -extern int board_nand_init(struct nand_chip *nand); +static unsigned long total_nand_size; /* in kiB */ -static void nand_init_chip(struct mtd_info *mtd, struct nand_chip *nand, - ulong base_addr) +/* Register an initialized NAND mtd device with the U-Boot NAND command. */ +int nand_register(int devnum) { - mtd->priv = nand; + struct mtd_info *mtd; + + if (devnum >= CONFIG_SYS_MAX_NAND_DEVICE) + return -EINVAL; + + mtd = &nand_info[devnum]; + + sprintf(dev_name[devnum], "nand%d", devnum); + mtd->name = dev_name[devnum]; + +#ifdef CONFIG_MTD_DEVICE + /* + * Add MTD device so that we can reference it later + * via the mtdcore infrastructure (e.g. ubi). + */ + add_mtd_device(mtd); +#endif + + total_nand_size += mtd->size / 1024; + + if (nand_curr_device == -1) + nand_curr_device = devnum; + return 0; +} + +#ifndef CONFIG_SYS_NAND_SELF_INIT +static void nand_init_chip(int i) +{ + struct mtd_info *mtd = &nand_info[i]; + struct nand_chip *nand = &nand_chip[i]; + ulong base_addr = base_address[i]; + int maxchips = CONFIG_SYS_NAND_MAX_CHIPS; + + if (maxchips < 1) + maxchips = 1; + + mtd->priv = nand; nand->IO_ADDR_R = nand->IO_ADDR_W = (void __iomem *)base_addr; - if (board_nand_init(nand) == 0) { - if (nand_scan(mtd, 1) == 0) { - if (!mtd->name) - mtd->name = (char *)default_nand_name; - } else - mtd->name = NULL; - } else { - mtd->name = NULL; - mtd->size = 0; - } + if (board_nand_init(nand)) + return; + + if (nand_scan(mtd, maxchips)) + return; + + nand_register(i); } +#endif void nand_init(void) { +#ifdef CONFIG_SYS_NAND_SELF_INIT + board_nand_init(); +#else int i; - unsigned int size = 0; - for (i = 0; i < CFG_MAX_NAND_DEVICE; i++) { - nand_init_chip(&nand_info[i], &nand_chip[i], base_address[i]); - size += nand_info[i].size; - if (nand_curr_device == -1) - nand_curr_device = i; - } - printf("%u MiB\n", size / (1024 * 1024)); - -#ifdef CFG_NAND_SELECT_DEVICE + + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) + nand_init_chip(i); +#endif + + printf("%lu MiB\n", total_nand_size / 1024); + +#ifdef CONFIG_SYS_NAND_SELECT_DEVICE /* * Select the chip in the board/cpu specific driver */ board_nand_select_device(nand_info[nand_curr_device].priv, nand_curr_device); #endif } - -#endif