X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Faltera_tse.c;h=54a944bfc4f221df510d55eb497f5b97f2884ed6;hb=1ad98ad66e5bb8a46a186a92f180bb9592d47673;hp=5c0c274ba3aad0d35f7e75fbbc3c49f8eee8b532;hpb=922d27b596c179c5a7d68abe45ede5adb1b6589c;p=u-boot

diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c
index 5c0c274ba3..54a944bfc4 100644
--- a/drivers/net/altera_tse.c
+++ b/drivers/net/altera_tse.c
@@ -426,7 +426,7 @@ static int tse_mdio_write(struct altera_tse_priv *priv, unsigned int regnum,
 
 /* MDIO access to phy */
 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) && !defined(BITBANGMII)
-static int altera_tse_miiphy_write(char *devname, unsigned char addr,
+static int altera_tse_miiphy_write(const char *devname, unsigned char addr,
 				   unsigned char reg, unsigned short value)
 {
 	struct eth_device *dev;
@@ -439,7 +439,7 @@ static int altera_tse_miiphy_write(char *devname, unsigned char addr,
 	return 0;
 }
 
-static int altera_tse_miiphy_read(char *devname, unsigned char addr,
+static int altera_tse_miiphy_read(const char *devname, unsigned char addr,
 				  unsigned char reg, unsigned short *value)
 {
 	struct eth_device *dev;
@@ -475,12 +475,12 @@ static uint mii_parse_sr(uint mii_reg, struct altera_tse_priv *priv)
 	 */
 	mii_reg = tse_mdio_read(priv, MIIM_STATUS);
 
-	if (!(mii_reg & MIIM_STATUS_LINK) && (mii_reg & PHY_BMSR_AUTN_ABLE)
-	    && !(mii_reg & PHY_BMSR_AUTN_COMP)) {
+	if (!(mii_reg & MIIM_STATUS_LINK) && (mii_reg & BMSR_ANEGCAPABLE)
+	    && !(mii_reg & BMSR_ANEGCOMPLETE)) {
 		int i = 0;
 
 		puts("Waiting for PHY auto negotiation to complete");
-		while (!(mii_reg & PHY_BMSR_AUTN_COMP)) {
+		while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
 			/*
 			 * Timeout reached ?
 			 */
@@ -643,13 +643,13 @@ static struct phy_info phy_info_generic = {
 	"Unknown/Generic PHY",
 	32,
 	(struct phy_cmd[]){	/* config */
-			   {PHY_BMCR, PHY_BMCR_RESET, NULL},
-			   {PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG, NULL},
+			   {MII_BMCR, BMCR_RESET, NULL},
+			   {MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART, NULL},
 			   {miim_end,}
 			   },
 	(struct phy_cmd[]){	/* startup */
-			   {PHY_BMSR, miim_read, NULL},
-			   {PHY_BMSR, miim_read, &mii_parse_sr},
+			   {MII_BMSR, miim_read, NULL},
+			   {MII_BMSR, miim_read, &mii_parse_sr},
 			   {miim_end,}
 			   },
 	(struct phy_cmd[]){	/* shutdown */