X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Farmada100_fec.c;h=ed7cf2032485839922d43efabfc781ffed8807df;hb=9a32084ea0cf55d22384f083002ee9932e074f31;hp=fbf97632c6df4707a05ab137454a2aa69d2c50f1;hpb=79788bb19ac0c68cef77bd92d3365bdf2989339d;p=u-boot

diff --git a/drivers/net/armada100_fec.c b/drivers/net/armada100_fec.c
index fbf97632c6..ed7cf20324 100644
--- a/drivers/net/armada100_fec.c
+++ b/drivers/net/armada100_fec.c
@@ -440,6 +440,7 @@ static int armdfec_init(struct eth_device *dev, bd_t *bd)
 	struct armdfec_device *darmdfec = to_darmdfec(dev);
 	struct armdfec_reg *regs = darmdfec->regs;
 	int phy_adr;
+	u32 temp;
 
 	armdfec_init_rx_desc_ring(darmdfec);
 
@@ -479,9 +480,12 @@ static int armdfec_init(struct eth_device *dev, bd_t *bd)
 	update_hash_table_mac_address(darmdfec, NULL, dev->enetaddr);
 
 	/* Update TX and RX queue descriptor register */
-	writel((u32)darmdfec->p_txdesc, &regs->txcdp[TXQ]);
-	writel((u32)darmdfec->p_rxdesc, &regs->rxfdp[RXQ]);
-	writel((u32)darmdfec->p_rxdesc_curr, &regs->rxcdp[RXQ]);
+	temp = (u32)&regs->txcdp[TXQ];
+	writel((u32)darmdfec->p_txdesc, temp);
+	temp = (u32)&regs->rxfdp[RXQ];
+	writel((u32)darmdfec->p_rxdesc, temp);
+	temp = (u32)&regs->rxcdp[RXQ];
+	writel((u32)darmdfec->p_rxdesc_curr, temp);
 
 	/* Enable Interrupts */
 	writel(ALL_INTS, &regs->im);
@@ -554,15 +558,14 @@ static void armdfec_halt(struct eth_device *dev)
 	clrbits_le32(&regs->pconf, PCR_EN);
 }
 
-static int armdfec_send(struct eth_device *dev, volatile void *dataptr,
-		    int datasize)
+static int armdfec_send(struct eth_device *dev, void *dataptr, int datasize)
 {
 	struct armdfec_device *darmdfec = to_darmdfec(dev);
 	struct armdfec_reg *regs = darmdfec->regs;
 	struct tx_desc *p_txdesc = darmdfec->p_txdesc;
 	void *p = (void *)dataptr;
 	int retry = PHY_WAIT_ITERATIONS * PHY_WAIT_MICRO_SECONDS;
-	u32 cmd_sts;
+	u32 cmd_sts, temp;
 
 	/* Copy buffer if it's misaligned */
 	if ((u32)dataptr & 0x07) {
@@ -583,7 +586,8 @@ static int armdfec_send(struct eth_device *dev, volatile void *dataptr,
 	p_txdesc->byte_cnt = datasize;
 
 	/* Apply send command using high priority TX queue */
-	writel((u32)p_txdesc, &regs->txcdp[TXQ]);
+	temp = (u32)&regs->txcdp[TXQ];
+	writel((u32)p_txdesc, temp);
 	writel(SDMA_CMD_TXDL | SDMA_CMD_TXDH | SDMA_CMD_ERD, &regs->sdma_cmd);
 
 	/*
@@ -614,6 +618,7 @@ static int armdfec_recv(struct eth_device *dev)
 	struct rx_desc *p_rxdesc_curr = darmdfec->p_rxdesc_curr;
 	u32 cmd_sts;
 	u32 timeout = 0;
+	u32 temp;
 
 	/* wait untill rx packet available or timeout */
 	do {
@@ -667,7 +672,8 @@ static int armdfec_recv(struct eth_device *dev)
 	p_rxdesc_curr->buf_size = PKTSIZE_ALIGN;
 	p_rxdesc_curr->byte_cnt = 0;
 
-	writel((u32)p_rxdesc_curr->nxtdesc_p, (u32)&darmdfec->p_rxdesc_curr);
+	temp = (u32)&darmdfec->p_rxdesc_curr;
+	writel((u32)p_rxdesc_curr->nxtdesc_p, temp);
 
 	return 0;
 }
@@ -709,7 +715,7 @@ int armada100_fec_register(unsigned long base_addr)
 	/* Assign ARMADA100 Fast Ethernet Controller Base Address */
 	darmdfec->regs = (void *)base_addr;
 
-	/* must be less than NAMESIZE (16) */
+	/* must be less than sizeof(dev->name) */
 	strcpy(dev->name, "armd-fec0");
 
 	dev->init = armdfec_init;