X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fdesignware.c;h=9ded8950b83d22aa6021ed8e81ee4141e6d85a23;hb=9d86c8dc960c6f4e7e349a41cd2757098da6a92f;hp=78751b2600c683a9bb9079c0a28b8c7beeab266c;hpb=e7d4a88e69459547a46906dbe021ccc83c614361;p=u-boot

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 78751b2600..9ded8950b8 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -249,7 +249,7 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
 	rx_descs_init(dev);
 	tx_descs_init(dev);
 
-	writel(FIXEDBURST | PRIORXTX_41 | BURST_16, &dma_p->busmode);
+	writel(FIXEDBURST | PRIORXTX_41 | DMA_PBL, &dma_p->busmode);
 
 	writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD,
 	       &dma_p->opmode);
@@ -279,11 +279,21 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
 	struct eth_dma_regs *dma_p = priv->dma_regs_p;
 	u32 desc_num = priv->tx_currdescnum;
 	struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
-
-	/* Invalidate only "status" field for the following check */
-	invalidate_dcache_range((unsigned long)&desc_p->txrx_status,
-				(unsigned long)&desc_p->txrx_status +
-				sizeof(desc_p->txrx_status));
+	uint32_t desc_start = (uint32_t)desc_p;
+	uint32_t desc_end = desc_start +
+		roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
+	uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
+	uint32_t data_end = data_start +
+		roundup(length, ARCH_DMA_MINALIGN);
+	/*
+	 * Strictly we only need to invalidate the "txrx_status" field
+	 * for the following check, but on some platforms we cannot
+	 * invalidate only 4 bytes, so we flush the entire descriptor,
+	 * which is 16 bytes in total. This is safe because the
+	 * individual descriptors in the array are each aligned to
+	 * ARCH_DMA_MINALIGN and padded appropriately.
+	 */
+	invalidate_dcache_range(desc_start, desc_end);
 
 	/* Check if the descriptor is owned by CPU */
 	if (desc_p->txrx_status & DESC_TXSTS_OWNBYDMA) {
@@ -291,11 +301,10 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
 		return -1;
 	}
 
-	memcpy((void *)desc_p->dmamac_addr, packet, length);
+	memcpy(desc_p->dmamac_addr, packet, length);
 
 	/* Flush data to be sent */
-	flush_dcache_range((unsigned long)desc_p->dmamac_addr,
-			   (unsigned long)desc_p->dmamac_addr + length);
+	flush_dcache_range(data_start, data_end);
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
 	desc_p->txrx_status |= DESC_TXSTS_TXFIRST | DESC_TXSTS_TXLAST;
@@ -313,8 +322,7 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
 #endif
 
 	/* Flush modified buffer descriptor */
-	flush_dcache_range((unsigned long)desc_p,
-			   (unsigned long)desc_p + sizeof(struct dmamacdescr));
+	flush_dcache_range(desc_start, desc_end);
 
 	/* Test the wrap-around condition. */
 	if (++desc_num >= CONFIG_TX_DESCR_NUM)
@@ -334,11 +342,14 @@ static int dw_eth_recv(struct eth_device *dev)
 	u32 status, desc_num = priv->rx_currdescnum;
 	struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
 	int length = 0;
+	uint32_t desc_start = (uint32_t)desc_p;
+	uint32_t desc_end = desc_start +
+		roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
+	uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
+	uint32_t data_end;
 
 	/* Invalidate entire buffer descriptor */
-	invalidate_dcache_range((unsigned long)desc_p,
-				(unsigned long)desc_p +
-				sizeof(struct dmamacdescr));
+	invalidate_dcache_range(desc_start, desc_end);
 
 	status = desc_p->txrx_status;
 
@@ -349,9 +360,8 @@ static int dw_eth_recv(struct eth_device *dev)
 			 DESC_RXSTS_FRMLENSHFT;
 
 		/* Invalidate received data */
-		invalidate_dcache_range((unsigned long)desc_p->dmamac_addr,
-					(unsigned long)desc_p->dmamac_addr +
-					length);
+		data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
+		invalidate_dcache_range(data_start, data_end);
 
 		NetReceive(desc_p->dmamac_addr, length);
 
@@ -362,9 +372,7 @@ static int dw_eth_recv(struct eth_device *dev)
 		desc_p->txrx_status |= DESC_RXSTS_OWNBYDMA;
 
 		/* Flush only status field - others weren't changed */
-		flush_dcache_range((unsigned long)&desc_p->txrx_status,
-				   (unsigned long)&desc_p->txrx_status +
-				   sizeof(desc_p->txrx_status));
+		flush_dcache_range(desc_start, desc_end);
 
 		/* Test the wrap-around condition. */
 		if (++desc_num >= CONFIG_RX_DESCR_NUM)
@@ -414,7 +422,8 @@ int designware_initialize(ulong base_addr, u32 interface)
 	 * Since the priv structure contains the descriptors which need a strict
 	 * buswidth alignment, memalign is used to allocate memory
 	 */
-	priv = (struct dw_eth_dev *) memalign(16, sizeof(struct dw_eth_dev));
+	priv = (struct dw_eth_dev *) memalign(ARCH_DMA_MINALIGN,
+					      sizeof(struct dw_eth_dev));
 	if (!priv) {
 		free(dev);
 		return -ENOMEM;