X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fdesignware.h;h=ce51102052eafad7e2b8fdb764f3cf91b33c5d2e;hb=9d86c8dc960c6f4e7e349a41cd2757098da6a92f;hp=40020bf26b8f6f4092d19920b9dc0c08ab0a1fbe;hpb=9afc1af01f2d4b033e0da5df105b399949976a12;p=u-boot

diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index 40020bf26b..ce51102052 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -2,23 +2,7 @@
  * (C) Copyright 2010
  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef _DW_ETH_H
@@ -32,8 +16,6 @@
 
 #define CONFIG_MACRESET_TIMEOUT	(3 * CONFIG_SYS_HZ)
 #define CONFIG_MDIO_TIMEOUT	(3 * CONFIG_SYS_HZ)
-#define CONFIG_PHYRESET_TIMEOUT	(3 * CONFIG_SYS_HZ)
-#define CONFIG_AUTONEG_TIMEOUT	(5 * CONFIG_SYS_HZ)
 
 struct eth_mac_regs {
 	u32 conf;		/* 0x00 */
@@ -95,18 +77,18 @@ struct eth_dma_regs {
 
 #define DW_DMA_BASE_OFFSET	(0x1000)
 
+/* Default DMA Burst length */
+#ifndef CONFIG_DW_GMAC_DEFAULT_DMA_PBL
+#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL 8
+#endif
+
 /* Bus mode register definitions */
 #define FIXEDBURST		(1 << 16)
 #define PRIORXTX_41		(3 << 14)
 #define PRIORXTX_31		(2 << 14)
 #define PRIORXTX_21		(1 << 14)
 #define PRIORXTX_11		(0 << 14)
-#define BURST_1			(1 << 8)
-#define BURST_2			(2 << 8)
-#define BURST_4			(4 << 8)
-#define BURST_8			(8 << 8)
-#define BURST_16		(16 << 8)
-#define BURST_32		(32 << 8)
+#define DMA_PBL			(CONFIG_DW_GMAC_DEFAULT_DMA_PBL<<8)
 #define RXHIGHPRIO		(1 << 1)
 #define DMAMAC_SRST		(1 << 0)
 
@@ -128,7 +110,7 @@ struct dmamacdescr {
 	u32 dmamac_cntl;
 	void *dmamac_addr;
 	struct dmamacdescr *dmamac_next;
-};
+} __aligned(ARCH_DMA_MINALIGN);
 
 /*
  * txrx_status definitions
@@ -233,34 +215,21 @@ struct dmamacdescr {
 #endif
 
 struct dw_eth_dev {
-	u32 address;
-	u32 interface;
-	u32 speed;
-	u32 duplex;
-	u32 tx_currdescnum;
-	u32 rx_currdescnum;
-	u32 phy_configured;
-	u32 padding;
-
 	struct dmamacdescr tx_mac_descrtable[CONFIG_TX_DESCR_NUM];
 	struct dmamacdescr rx_mac_descrtable[CONFIG_RX_DESCR_NUM];
+	char txbuffs[TX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
+	char rxbuffs[RX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN);
 
-	char txbuffs[TX_TOTAL_BUFSIZE];
-	char rxbuffs[RX_TOTAL_BUFSIZE];
+	u32 interface;
+	u32 tx_currdescnum;
+	u32 rx_currdescnum;
 
 	struct eth_mac_regs *mac_regs_p;
 	struct eth_dma_regs *dma_regs_p;
 
 	struct eth_device *dev;
-} __attribute__ ((aligned(8)));
-
-/* Speed specific definitions */
-#define SPEED_10M		1
-#define SPEED_100M		2
-#define SPEED_1000M		3
-
-/* Duplex mode specific definitions */
-#define HALF_DUPLEX		1
-#define FULL_DUPLEX		2
+	struct phy_device *phydev;
+	struct mii_dev *bus;
+};
 
 #endif