X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fe1000.h;h=1bbae5085ac9dac0fbf431c1c4bb8f231e50e9c1;hb=714afa64f3d81a660715b61785f1f3a3b986f852;hp=d8400d4590c1957915a6ca86a6600397ca045a01;hpb=7a341066117f9eb5eb9385f61176ef6a08b90163;p=u-boot

diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h
index d8400d4590..1bbae5085a 100644
--- a/drivers/net/e1000.h
+++ b/drivers/net/e1000.h
@@ -1551,6 +1551,7 @@ struct e1000_hw {
 #define E1000_RXDCTL_HTHRESH 0x00003F00	/* RXDCTL Host Threshold */
 #define E1000_RXDCTL_WTHRESH 0x003F0000	/* RXDCTL Writeback Threshold */
 #define E1000_RXDCTL_GRAN    0x01000000	/* RXDCTL Granularity */
+#define E1000_RXDCTL_FULL_RX_DESC_WB 0x01010000	/* GRAN=1, WTHRESH=1 */
 
 /* Transmit Descriptor Control */
 #define E1000_TXDCTL_PTHRESH 0x0000003F	/* TXDCTL Prefetch Threshold */
@@ -1678,14 +1679,6 @@ struct e1000_hw {
 #define EEPROM_EWEN_OPCODE  0x13	/* EERPOM erase/write enable */
 #define EEPROM_EWDS_OPCODE  0x10	/* EERPOM erast/write disable */
 
-/* EEPROM Word Offsets */
-#define EEPROM_COMPAT		   0x0003
-#define EEPROM_ID_LED_SETTINGS	   0x0004
-#define EEPROM_INIT_CONTROL1_REG   0x000A
-#define EEPROM_INIT_CONTROL2_REG   0x000F
-#define EEPROM_FLASH_VERSION	   0x0032
-#define EEPROM_CHECKSUM_REG	   0x003F
-
 /* Word definitions for ID LED Settings */
 #define ID_LED_RESERVED_0000 0x0000
 #define ID_LED_RESERVED_FFFF 0xFFFF
@@ -2479,7 +2472,6 @@ struct e1000_hw {
 #define ADVERTISE_100_FULL		0x0008
 #define ADVERTISE_1000_HALF		0x0010
 #define ADVERTISE_1000_FULL		0x0020
-#define AUTONEG_ADVERTISE_SPEED_DEFAULT 0x002F	/* Everything but 1000-Half */
 
 #define ICH_FLASH_GFPREG   0x0000
 #define ICH_FLASH_HSFSTS   0x0004
@@ -2504,7 +2496,6 @@ struct e1000_hw {
 #define ICH_GFPREG_BASE_MASK       0x1FFF
 #define ICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF
 
-#define E1000_EEWR     0x0102C  /* EEPROM Write Register - RW */
 #define E1000_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */
 
 /* SPI EEPROM Status Register */
@@ -2599,7 +2590,6 @@ struct e1000_hw {
 #define PHY_CFG_TIMEOUT             100
 #define DEFAULT_80003ES2LAN_TIPG_IPGT_10_100 0x00000009
 #define DEFAULT_80003ES2LAN_TIPG_IPGT_1000   0x00000008
-#define E1000_TXDMAC_DPP 0x00000001
 #define AUTO_ALL_MODES	0
 
 #ifndef E1000_MASTER_SLAVE