X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fe1000.h;h=2ae30855154c2fffe8680f3f5e9695db1d6e7fb5;hb=4e7c1a26518fc4332f23c3ee001e10a31555b2b1;hp=c851922ae5c791670778b9111e96cade2fea3419;hpb=c6d80a152207f6fad5a8e79bf1005fdbabb16d12;p=u-boot diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h index c851922ae5..2ae3085515 100644 --- a/drivers/net/e1000.h +++ b/drivers/net/e1000.h @@ -1,11 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /******************************************************************************* Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved. Copyright 2011 Freescale Semiconductor, Inc. - * SPDX-License-Identifier: GPL-2.0+ - Contact Information: Linux NICS Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 @@ -1084,7 +1083,11 @@ struct e1000_hw { #endif unsigned int cardnum; +#ifdef CONFIG_DM_ETH + struct udevice *pdev; +#else pci_dev_t pdev; +#endif uint8_t *hw_addr; e1000_mac_type mac_type; e1000_phy_type phy_type; @@ -1093,11 +1096,6 @@ struct e1000_hw { e1000_media_type media_type; e1000_fc_type fc; e1000_bus_type bus_type; -#if 0 - e1000_bus_speed bus_speed; - e1000_bus_width bus_width; - uint32_t io_base; -#endif uint32_t asf_firmware_present; #ifndef CONFIG_E1000_NO_NVM uint32_t eeprom_semaphore_present; @@ -1116,29 +1114,11 @@ struct e1000_hw { uint32_t original_fc; uint32_t txcw; uint32_t autoneg_failed; -#if 0 - uint32_t max_frame_size; - uint32_t min_frame_size; - uint32_t mc_filter_type; - uint32_t num_mc_addrs; - uint32_t collision_delta; - uint32_t tx_packet_delta; - uint32_t ledctl_default; - uint32_t ledctl_mode1; - uint32_t ledctl_mode2; -#endif uint16_t autoneg_advertised; uint16_t pci_cmd_word; uint16_t fc_high_water; uint16_t fc_low_water; uint16_t fc_pause_time; -#if 0 - uint16_t current_ifs_val; - uint16_t ifs_min_val; - uint16_t ifs_max_val; - uint16_t ifs_step_size; - uint16_t ifs_ratio; -#endif uint16_t device_id; uint16_t vendor_id; uint16_t subsystem_id; @@ -1149,9 +1129,6 @@ struct e1000_hw { uint8_t forced_speed_duplex; uint8_t wait_autoneg_complete; uint8_t dma_fairness; -#if 0 - uint8_t perm_mac_addr[NODE_ADDRESS_SIZE]; -#endif bool disable_polarity_correction; bool speed_downgraded; bool get_link_status; @@ -1162,11 +1139,6 @@ struct e1000_hw { bool report_tx_early; bool phy_reset_disable; bool initialize_hw_bits_disable; -#if 0 - bool adaptive_ifs; - bool ifs_params_forced; - bool in_ifs_mode; -#endif e1000_smart_speed smart_speed; e1000_dsp_config dsp_config_state; }; @@ -1269,6 +1241,9 @@ struct e1000_hw { #define E1000_EECD_SELSHAD 0x00020000 /* Select Shadow RAM */ #define E1000_EECD_INITSRAM 0x00040000 /* Initialize Shadow RAM */ #define E1000_EECD_FLUPD 0x00080000 /* Update FLASH */ +#define E1000_EECD_FLUPD_I210 0x00800000 /* Update FLASH */ +#define E1000_EECD_FLUDONE_I210 0x04000000 /* Update FLASH done*/ +#define E1000_FLUDONE_ATTEMPTS 20000 #define E1000_EECD_AUPDEN 0x00100000 /* Enable Autonomous FLASH update */ #define E1000_EECD_SHADV 0x00200000 /* Shadow RAM Data Valid */ #define E1000_EECD_SEC1VAL 0x00400000 /* Sector One Valid */