X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fenc28j60.c;h=3238a502ca75029d19d2d6bf30f0195b7e19d0b1;hb=5b1b1883ffcb75de71a0b4e66b279c88ae1e15fc;hp=98303aceee9fd9be20e857c271aea6a81a4456e2;hpb=2439e4bfa111babf4bc07ba20efbf3e36036813e;p=u-boot

diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c
index 98303aceee..3238a502ca 100644
--- a/drivers/net/enc28j60.c
+++ b/drivers/net/enc28j60.c
@@ -17,7 +17,6 @@
 
 #include <config.h>
 #include <common.h>
-#ifdef CONFIG_ENC28J60
 #include <net.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spi.h>
@@ -331,6 +330,7 @@ static int rxResetCounter = 0;
 int eth_init (bd_t * bis)
 {
 	unsigned char estatVal;
+	uchar enetaddr[6];
 
 	/* configure GPIO */
 	(*((volatile unsigned long *) IO1DIR)) |= ENC_SPI_SLAVE_CS;
@@ -352,7 +352,8 @@ int eth_init (bd_t * bis)
 
 	/* initialize controller */
 	encReset ();
-	encInit (bis->bi_enetaddr);
+	eth_getenv_enetaddr("ethaddr", enetaddr);
+	encInit (enetaddr);
 
 	m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXEN);	/* enable receive */
 
@@ -979,5 +980,3 @@ static void phyWrite(unsigned char addr, unsigned short data)
 		}
 	}
 }
-
-#endif /* CONFIG_ENC28J60 */