X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Ffsl_mcdmafec.c;h=00d905c299de4d6e3d451ec886067b88c7f9d523;hb=2600df4f8ef12ece9cec13030005919e0ba2b0d5;hp=35a6dfbe94c6661adabbdb29365794eab952dc85;hpb=8206bfae3ab7f99965136384360ba2de0c6f4c3b;p=u-boot diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c index 35a6dfbe94..00d905c299 100644 --- a/drivers/net/fsl_mcdmafec.c +++ b/drivers/net/fsl_mcdmafec.c @@ -5,26 +5,11 @@ * (C) Copyright 2007 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include +#include #include #include #include @@ -116,7 +101,7 @@ struct fec_info_dma fec_info[] = { #endif }; -static int fec_send(struct eth_device *dev, volatile void *packet, int length); +static int fec_send(struct eth_device *dev, void *packet, int length); static int fec_recv(struct eth_device *dev); static int fec_init(struct eth_device *dev, bd_t * bd); static void fec_halt(struct eth_device *dev); @@ -194,13 +179,13 @@ static void set_fec_duplex_speed(volatile fecdma_t * fecp, bd_t * bd, } } -static int fec_send(struct eth_device *dev, volatile void *packet, int length) +static int fec_send(struct eth_device *dev, void *packet, int length) { struct fec_info_dma *info = dev->priv; cbd_t *pTbd, *pUsedTbd; u16 phyStatus; - miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &phyStatus); + miiphy_read(dev->name, info->phy_addr, MII_BMSR, &phyStatus); /* process all the consumed TBDs */ while (info->cleanTbdNum < CONFIG_SYS_TX_ETH_BUFFER) { @@ -260,7 +245,7 @@ static int fec_recv(struct eth_device *dev) struct fec_info_dma *info = dev->priv; volatile fecdma_t *fecp = (fecdma_t *) (info->iobase); - cbd_t *pRbd = &info->rxbd[info->rxIdx]; + cbd_t *prbd = &info->rxbd[info->rxIdx]; u32 ievent; int frame_length, len = 0; @@ -292,27 +277,27 @@ static int fec_recv(struct eth_device *dev) } } - if (!(pRbd->cbd_sc & BD_ENET_RX_EMPTY)) { - if ((pRbd->cbd_sc & BD_ENET_RX_LAST) - && !(pRbd->cbd_sc & BD_ENET_RX_ERR) - && ((pRbd->cbd_datlen - 4) > 14)) { + if (!(prbd->cbd_sc & BD_ENET_RX_EMPTY)) { + if ((prbd->cbd_sc & BD_ENET_RX_LAST) && + !(prbd->cbd_sc & BD_ENET_RX_ERR) && + ((prbd->cbd_datlen - 4) > 14)) { /* Get buffer address and size */ - frame_length = pRbd->cbd_datlen - 4; + frame_length = prbd->cbd_datlen - 4; /* Fill the buffer and pass it to upper layers */ - NetReceive((volatile uchar *)pRbd->cbd_bufaddr, - frame_length); + net_process_received_packet((uchar *)prbd->cbd_bufaddr, + frame_length); len = frame_length; } /* Reset buffer descriptor as empty */ if ((info->rxIdx) == (PKTBUFSRX - 1)) - pRbd->cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY); + prbd->cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY); else - pRbd->cbd_sc = BD_ENET_RX_EMPTY; + prbd->cbd_sc = BD_ENET_RX_EMPTY; - pRbd->cbd_datlen = PKTSIZE_ALIGN; + prbd->cbd_datlen = PKTSIZE_ALIGN; /* Now, we have an empty RxBD, restart the DMA receive task */ MCD_continDma(info->rxTask); @@ -399,15 +384,15 @@ static int fec_init(struct eth_device *dev, bd_t * bd) /* Set station address */ if ((u32) fecp == CONFIG_SYS_FEC0_IOBASE) - eth_getenv_enetaddr("ethaddr", enetaddr); + eth_env_get_enetaddr("ethaddr", enetaddr); else - eth_getenv_enetaddr("eth1addr", enetaddr); + eth_env_get_enetaddr("eth1addr", enetaddr); fec_set_hwaddr(fecp, enetaddr); /* Set Opcode/Pause Duration Register */ fecp->opd = 0x00010020; - /* Setup Buffers and Buffer Desriptors */ + /* Setup Buffers and Buffer Descriptors */ info->rxIdx = 0; info->txIdx = 0; @@ -416,7 +401,7 @@ static int fec_init(struct eth_device *dev, bd_t * bd) for (i = 0; i < PKTBUFSRX; i++) { info->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY; info->rxbd[i].cbd_datlen = PKTSIZE_ALIGN; - info->rxbd[i].cbd_bufaddr = (uint) NetRxPackets[i]; + info->rxbd[i].cbd_bufaddr = (uint) net_rx_packets[i]; } info->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP; @@ -491,7 +476,7 @@ static void fec_halt(struct eth_device *dev) /* Disable DMA tasks */ MCD_killDma(info->txTask); - MCD_killDma(info->rxTask);; + MCD_killDma(info->rxTask); /* Disable the Ethernet Controller */ fecp->ecr &= ~FEC_ECR_ETHER_EN; @@ -521,7 +506,7 @@ int mcdmafec_initialize(bd_t * bis) u32 tmp = CONFIG_SYS_INTSRAM + 0x2000; #endif - for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) { + for (i = 0; i < ARRAY_SIZE(fec_info); i++) { dev = (struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE, @@ -572,8 +557,17 @@ int mcdmafec_initialize(bd_t * bis) eth_register(dev); #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - miiphy_register(dev->name, - mcffec_miiphy_read, mcffec_miiphy_write); + int retval; + struct mii_dev *mdiodev = mdio_alloc(); + if (!mdiodev) + return -ENOMEM; + strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN); + mdiodev->read = mcffec_miiphy_read; + mdiodev->write = mcffec_miiphy_write; + + retval = mdio_register(mdiodev); + if (retval < 0) + return retval; #endif if (i > 0)