X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Finca-ip_sw.c;h=f0f62deaf8e0d0e95dd0c4682c58c70823100e8e;hb=10cbe3b6a4b2289906fc94bb26810191607ee748;hp=492f5ce8f8850cb03aefc6f71bcfcc91f9ffb8aa;hpb=ce42d166ac3c55ebf1e7c2f9707a79acefa006be;p=u-boot diff --git a/drivers/net/inca-ip_sw.c b/drivers/net/inca-ip_sw.c index 492f5ce8f8..f0f62deaf8 100644 --- a/drivers/net/inca-ip_sw.c +++ b/drivers/net/inca-ip_sw.c @@ -158,7 +158,7 @@ static int initialized = 0; static int inca_switch_init(struct eth_device *dev, bd_t * bis); -static int inca_switch_send(struct eth_device *dev, volatile void *packet, int length); +static int inca_switch_send(struct eth_device *dev, void *packet, int length); static int inca_switch_recv(struct eth_device *dev); static void inca_switch_halt(struct eth_device *dev); static void inca_init_switch_chip(void); @@ -291,9 +291,7 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis) /* Initialize RxDMA. */ DMA_READ_REG(INCA_IP_DMA_DMA_RXISR, v); -#if 0 - printf("RX status = 0x%08X\n", v); -#endif + debug("RX status = 0x%08X\n", v); /* Writing to the FRDA of CHANNEL. */ @@ -306,9 +304,7 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis) /* Initialize TxDMA. */ DMA_READ_REG(INCA_IP_DMA_DMA_TXISR, v); -#if 0 - printf("TX status = 0x%08X\n", v); -#endif + debug("TX status = 0x%08X\n", v); /* Writing to the FRDA of CHANNEL. */ @@ -338,7 +334,7 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis) } -static int inca_switch_send(struct eth_device *dev, volatile void *packet, int length) +static int inca_switch_send(struct eth_device *dev, void *packet, int length) { int i; int res = -1; @@ -756,7 +752,7 @@ static int inca_amdix(void) (0x1 << 31) | /* RA */ (0x0 << 30) | /* Read */ (0x6 << 21) | /* LAN */ - (6 << 16)); /* PHY_ANER */ + (6 << 16)); /* MII_EXPANSION */ do { SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg6); } while (phyReg6 & (1 << 31)); @@ -769,7 +765,7 @@ static int inca_amdix(void) (0x1 << 31) | /* RA */ (0x0 << 30) | /* Read */ (0x6 << 21) | /* LAN */ - (4 << 16)); /* PHY_ANAR */ + (4 << 16)); /* MII_ADVERTISE */ do { SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg4); } while (phyReg4 & (1 << 31)); @@ -782,7 +778,7 @@ static int inca_amdix(void) (0x1 << 31) | /* RA */ (0x0 << 30) | /* Read */ (0x6 << 21) | /* LAN */ - (5 << 16)); /* PHY_ANLPAR */ + (5 << 16)); /* MII_LPA */ do { SW_READ_REG(INCA_IP_Switch_MDIO_ACC, phyReg5); } while (phyReg5 & (1 << 31));