X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fmcffec.c;h=7c4b210b00111070b4b037cb944a4e1481969bd1;hb=cb96a0a4c90e64b286d1b117374d16817b1c8521;hp=64be5de52facdceb0b09c363994d7f5ea50852a5;hpb=8206bfae3ab7f99965136384360ba2de0c6f4c3b;p=u-boot diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index 64be5de52f..7c4b210b00 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -5,23 +5,7 @@ * (C) Copyright 2007 Freescale Semiconductor, Inc. * TsiChung Liew (Tsi-Chung.Liew@freescale.com) * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -95,7 +79,6 @@ struct fec_info_s fec_info[] = { #endif }; -int fec_send(struct eth_device *dev, volatile void *packet, int length); int fec_recv(struct eth_device *dev); int fec_init(struct eth_device *dev, bd_t * bd); void fec_halt(struct eth_device *dev); @@ -134,14 +117,14 @@ void setFecDuplexSpeed(volatile fec_t * fecp, bd_t * bd, int dup_spd) } } -int fec_send(struct eth_device *dev, volatile void *packet, int length) +static int fec_send(struct eth_device *dev, void *packet, int length) { struct fec_info_s *info = dev->priv; volatile fec_t *fecp = (fec_t *) (info->iobase); int j, rc; u16 phyStatus; - miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &phyStatus); + miiphy_read(dev->name, info->phy_addr, MII_BMSR, &phyStatus); /* section 16.9.23.3 * Wait for ready @@ -560,7 +543,7 @@ int mcffec_initialize(bd_t * bis) u32 tmp = CONFIG_SYS_INIT_RAM_ADDR + 0x1000; #endif - for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) { + for (i = 0; i < ARRAY_SIZE(fec_info); i++) { dev = (struct eth_device *)memalign(CONFIG_SYS_CACHELINE_SIZE,