X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fmpc5xxx_fec.c;h=bc8c9222dcf8f9ac9f9d41ba9d16b03279b19cda;hb=bace3d00f28040f061e0e21126bc70cfb9d20930;hp=4a1c8e6e42e95f467dde7e61ddc06a9cab78af58;hpb=3df4f46f3209c067dcadc969ed02d27c97fa3632;p=u-boot diff --git a/drivers/net/mpc5xxx_fec.c b/drivers/net/mpc5xxx_fec.c index 4a1c8e6e42..bc8c9222dc 100644 --- a/drivers/net/mpc5xxx_fec.c +++ b/drivers/net/mpc5xxx_fec.c @@ -35,8 +35,8 @@ typedef struct { uint8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */ } NBUF; -int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal); -int fec5xxx_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data); +int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 *retVal); +int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data); static int mpc5xxx_fec_init_phy(struct eth_device *dev, bd_t * bis); @@ -249,6 +249,13 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis) mpc5xxx_fec_init_phy(dev, bis); + /* + * Call board-specific PHY fixups (if any) + */ +#ifdef CONFIG_RESET_PHY_R + reset_phy(); +#endif + /* * Initialize RxBD/TxBD rings */ @@ -941,7 +948,7 @@ int mpc5xxx_fec_initialize(bd_t * bis) /* MII-interface related functions */ /********************************************************************/ -int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal) +int fec5xxx_miiphy_read(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal) { ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC; uint32 reg; /* convenient holder for the PHY register */ @@ -983,7 +990,7 @@ int fec5xxx_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * re } /********************************************************************/ -int fec5xxx_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data) +int fec5xxx_miiphy_write(const char *devname, uint8 phyAddr, uint8 regAddr, uint16 data) { ethernet_regs *eth = (ethernet_regs *)MPC5XXX_FEC; uint32 reg; /* convenient holder for the PHY register */